Memory Block Read Tracking for Slow Read Disturb Mitigation
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Solution Overview
Problem
Existing memory sub-systems suffer from slow read disturb, which causes adjacent memory cells to discharge voltage slowly, leading to increased error rates and reduced performance due to the need for additional voltage discharge commands, regardless of whether they are issued regularly or only when errors are detected.
Innovation Solution
Identify the trailing read operation in a sequence of operations and issue a voltage discharge command specifically to the block associated with that read, using a counter and timer to track read frequency and time elapsed since the last operation, thereby targeting the precise block causing slow read disturb.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If voltage discharge commands are issued regularly or upon error detection, then error rates are reduced, but system performance decreases due to unnecessary commands and increased latency
Solution Approach 1:
The system performs preliminary identification of trailing read operations before issuing voltage discharge commands. By tracking read operations and identifying the trailing read that causes slow read disturb, the system proactively issues discharge commands only when necessary, preventing error accumulation while avoiding unnecessary commands that would degrade performance.
Solution Approach 2:
The system applies voltage discharge commands locally and selectively to specific blocks that have experienced trailing read operations, rather than applying them globally or regularly. This targeted approach ensures that discharge commands are issued only where needed to mitigate slow read disturb, maintaining high system performance while reducing error rates in affected blocks.
2Reliability
If voltage discharge commands are issued frequently, then slow read disturb is mitigated, but the number of commands increases leading to reduced performance
Solution Approach 1:
The system uses self-service by monitoring its own read operation patterns and automatically identifying trailing reads that cause slow read disturb. The counter and timer mechanisms track read operations autonomously, enabling the system to service itself by issuing discharge commands only when the monitoring detects actual slow read disturb conditions, thereby minimizing unnecessary time loss.
Solution Approach 2:
The system performs preliminary tracking of read operations using counters and timers to identify trailing reads before issuing voltage discharge commands. This advance identification ensures that discharge commands are issued only when genuinely needed to mitigate slow read disturb, avoiding the time loss associated with frequent unnecessary commands while maintaining reliable mitigation.
3Productivity
If trailing read identification is implemented, then voltage discharge commands are minimized, but device complexity increases due to counter and timer mechanisms
Solution Approach 1:
The counter and timer mechanisms serve multiple functions: they track read operation frequency, identify trailing reads, and trigger voltage discharge commands only when necessary. This multi-functionality reduces the overall need for separate monitoring and control mechanisms, minimizing device complexity while enabling effective trailing read identification and reduction of unnecessary discharge commands.
Data Source
AI summary
Disclosed is a system that comprises a memory device and a processing device, operatively coupled with the memory device, to perform operations that include, responsive to receiving a read request to perform a read operation on a block of the memory device, incrementing a counter associated with the block to track a number of read operations performed on the block; setting a timer associated with the block to an initial value; determining that respective values of the counter and the timer are indicative of a minimum number of read operations performed on the block; and issuing a voltage discharge command to the block, wherein issuing the voltage discharge command results in the block reaching a ground voltage.