Train Signal Processing with Hardwired Time Synchronization

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Solution Overview

Problem

The challenge is to shorten the response time for train signal processing while ensuring high functional safety levels, as logical control units (LCUs) replace critical safety relays in rail transit systems, necessitating real-time performance comparable to safety relays.

Innovation Solution

Implement time synchronization between a master processor and a slave processor using a hardware device to ensure data consistency and perform fail-safe operations when inconsistencies are detected, thereby shortening response times and maintaining system safety.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If logical control units (LCUs) replace critical safety relays to implement more functions, then functional versatility is improved, but response time increases beyond the switching time of safety relays

Engineering Contradiction:
Improvefunctional versatilityVSAvoidresponse time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The system is divided into master processor and slave processor, each independently acquiring data from the same target position. This segmentation allows parallel data acquisition while maintaining the ability to verify consistency, thus reducing overall response time while ensuring safety

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Both master and slave processors acquire data simultaneously from the target position before any processing or comparison occurs. This preliminary parallel action reduces the total time required compared to sequential processing

Inventive Principle:
Principle #10Preliminary action

2Reliability

If data consistency verification between master and slave processors is performed, then system reliability is improved, but processing time increases

Engineering Contradiction:
Improvesystem reliabilityVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

Data acquisition by both master and slave processors occurs simultaneously and preliminarily, before the consistency verification step. This parallel preliminary action ensures that the verification process only needs to compare already-acquired data, minimizing additional processing time

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The slave processor creates a copy of the data acquisition process independently, and the consistency verification simply compares the original (master) with the copy (slave). This copying approach allows for reliable verification without requiring complex additional processing

Inventive Principle:
Principle #26Copying

Data Source

PatentEP4685032A1Train-signal processing method, system and device
Publication Date: 2026.01.28 CRRC ZHUZHOU ELECTRIC LOCOMOTIVE RESEARCH INSTITUTE CO LTD
  • EP4685032A1 patent drawingFigure 1
  • EP4685032A1 patent drawingFigure 2
  • EP4685032A1 patent drawingFigure 3

AI summary

A train-signal processing method, system and device, which are applied to the technical field of rail transit. A master processor is in communication connection with a slave processor, and a first hardware device sends a time-synchronization hard wire signal to the master processor and the slave processor at the same time. When applied to the master processor, the train-signal processing method comprises: determining whether first collected data received by means of a first input channel is consistent with second collected data sent by a slave processor; if not, entering a fail-safe state; and if so, executing a data processing operation, so as to obtain a first processing result and execute same, wherein the first collected data and the second collected data are respectively data of a target position which is collected by the master processor at a first moment and data of the target position which is collected by the slave processor at the first moment. By means of applying the solution of the present application, the reliability of a train-signal processing process is guaranteed by means of providing a master processor and a slave processor, and time synchronization of the master processor and the slave processor is realized by means of a time-synchronization hard wire signal, thereby saving on a response time in the train-signal processing process.