Adaptive Equalization Training Frame Detection in 10 GbE Systems
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Solution Overview
Problem
10 GbE communication systems face challenges in maintaining Clock and Data Recovery (CDR) lock during long trails of ones and zeros in training frames, leading to potential bit shifts in recovered data, which affects the accuracy of adaptive equalization in 10 GBASE-KR devices.
Innovation Solution
The method involves detecting and decoding adaptive equalization training frames by shifting received data, inserting predefined binary values, applying logic functions like XOR, and identifying frame markers within the frames to accommodate bit shifts and ensure accurate decoding, particularly using Differential Manchester Encoding techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If training frames contain long trails of ones and zeros for adaptive equalization, then equalization accuracy is improved, but CDR lock stability deteriorates
Solution Approach 1:
The patent applies preliminary action by performing bit shift compensation before decoding the training frame data. The system detects potential bit shifts that may occur during long trails of identical bits and预先 adjusts the data positioning, ensuring accurate decoding even when CDR lock is temporarily lost during equalization training.
2Measurement precision
If the CDR device maintains strict lock requirement, then data recovery accuracy is improved, but ability to handle long trails of ones and zeros deteriorates
Solution Approach 1:
The patent applies dynamics by making the bit position adjustment dynamic rather than fixed. The system continuously monitors for bit shifts during data reception and dynamically adjusts the bit positioning, allowing the CDR to adapt to varying conditions during training frames while maintaining data recovery accuracy.
Solution Approach 2:
The patent changes the parameter of bit position offset dynamically during reception. When long trails of ones or zeros are detected, the system adjusts the bit position parameter to compensate for shifts, enabling the CDR to handle varied bit pattern conditions effectively.
3Reliability
If bit shift compensation mechanisms are added to handle CDR lock loss, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent applies self-service by enabling the decoding system to automatically detect and correct its own bit position errors without external intervention. The system monitors its own reception state, detects bit shifts, and self-corrects the positioning, reducing the need for complex external control mechanisms.
Solution Approach 2:
The patent implements feedback by continuously monitoring the received data for signs of bit shifts and using this information to adjust the bit positioning in real-time. The system feeds back the detected shift conditions to the decoding mechanism, enabling automatic compensation without increasing overall system complexity.
Data Source
AI summary
Methods and apparatus are provided for detecting and decoding adaptive equalization training frames (having a frame marker comprised of a string of binary ones and binary zeroes). Training frames are detected by shifting the received data; inserting at least one binary value at one end of the shifted received data to generate a modified version of the received data; applying a logic function to the received data and the modified version of the received data that identifies when corresponding bit positions have different values; and detecting the frame marker when an output of the logic function has a first binary value in an approximate middle of a string of a second binary value. The training frames are decoded using a distance between the approximate center of the frame marker and a predefined binary value in an output of the logic function.