Transaction Response Buffering for Ordered Routing

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Solution Overview

Problem

In transaction handling systems where multiple slave devices service transactions with the same identifier, ensuring responses are returned in the correct order is challenging, especially when transactions are routed to multiple slave devices.

Innovation Solution

A transaction handling apparatus and method that utilize a response buffer and tracking circuitry to store data on each transaction, controlling the routing of responses and indicating whether a previous transaction has been output, ensuring that buffered transaction responses are output to the correct transaction master device only after the preceding transaction has been output.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If transactions with the same identifier are routed to multiple slave devices, then system throughput and performance are improved, but ensuring correct response ordering becomes more complex and difficult

Engineering Contradiction:
Improvesystem throughputVSAvoidresponse ordering complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

A response buffer is introduced as an intermediary component between multiple slave devices and the master device. The buffer temporarily stores transaction responses and releases them in the correct order, mediating between the parallel response generation from multiple slaves and the sequential response delivery requirement to the master.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system performs preliminary actions by pre-buffering transaction responses before they are delivered to the master device. The response buffer holds responses in advance, allowing the system to maintain correct ordering without requiring complex real-time coordination between multiple slave devices.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If a response buffer is used to maintain transaction ordering, then correct response ordering is ensured, but buffer size requirements increase and power consumption rises

Engineering Contradiction:
Improveresponse ordering accuracyVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

Instead of buffering all transaction responses unconditionally, the system applies partial buffering only when necessary to maintain ordering. The response buffer is selectively used based on whether ordering is required, avoiding unnecessary power consumption from buffering responses that don't require ordering maintenance.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The response buffering mechanism is made dynamic rather than static. The buffer operates actively only when transaction ordering is required, and can be optimized or reduced when ordering constraints are not present, allowing power consumption to adapt to actual system needs.

Inventive Principle:
Principle #15Dynamics

3Ease of operation

If tracking circuitry is integrated with the response buffer, then response routing control is simplified, but device area and implementation complexity increase

Engineering Contradiction:
Improveresponse routing controlVSAvoidcircuitry area
Core Design Contradiction:
Ease of operationVSArea of stationary object

Solution Approach 1:

The response buffer is designed to serve multiple functions: it not only buffers transaction responses but also incorporates tracking circuitry for monitoring transaction states and routing control logic for directing responses to appropriate destinations. This multi-functional design consolidates several components into one, reducing overall device area.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The tracking circuitry and response buffer are merged into a single integrated component rather than being implemented as separate entities. This consolidation combines the buffering function with the tracking and routing control functions, reducing the total circuitry area and simplifying the overall architecture.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10255103B2Transaction handling
Publication Date: 2019.04.09 ARM LTD
  • US10255103B2 patent drawing
  • US10255103B2 patent drawing
  • US10255103B2 patent drawing

AI summary

Transaction handling apparatus comprises a response buffer; and tracking circuitry to store data defining each transaction issued by one or more transaction master devices and to control routing of a transaction response to a given transaction either to the response buffer or as an output to the transaction master device which issued the given transaction; the response buffer being configured to access an indicator for each buffered transaction response indicating whether a response has been output by the apparatus for a previously issued transaction, on which that buffered transaction response depends, and to output the buffered transaction response to the transaction master device which issued that transaction when the previously issued transaction has already been output by the apparatus.