Transaction Sequence Diagram for Semiconductor Test Bench Debugging
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Solution Overview
Problem
Current methodologies for verifying semiconductor chip designs, such as OVM and UVM, lack a clear visualization of the absolute temporal sequence of transactions in their waveform views, making it difficult for integrated circuit designers to analyze and debug test bench simulations effectively.
Innovation Solution
A modified OVM library is implemented to record and display transaction-specific data, enabling the generation of sequence diagrams that show the temporal relationships between test bench components, allowing for a more intuitive understanding of test bench behavior by leveraging System Verilog code and a flexible logging function to log transaction-level activity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If waveform view is used to visualize signal transitions, then relative temporal sequence of transactions is shown, but absolute temporal sequence is not readily provided
Solution Approach 1:
The patent introduces a new dimension to the visualization by adding an absolute time axis to the traditional waveform view. This transforms the display from showing only relative temporal relationships between signals to simultaneously showing both relative and absolute temporal information, thereby resolving the contradiction between ease of visualization and completeness of temporal information.
2Quantity of substance
If detailed transaction information is recorded for each component, then comprehensive transaction data is available, but intuitive understanding of overall test bench behavior is lost
Solution Approach 1:
The patent merges individual component transaction views with an overall system-level temporal sequence view. By combining detailed transaction data with a unified absolute time reference frame, the system provides both comprehensive data retention and intuitive overall behavior understanding, resolving the contradiction between data quantity and ease of understanding.
Data Source
AI summary
Methods and apparatus for recording and visualizing transactions of a test bench simulation are disclosed. Transaction-specific data generated from a test bench simulation may be displayed in a sequence diagram view to provide a view of the transactions arranged sequentially in time.