Transaction Table With Page Bitmap for Low-Latency Deduplicated Memory
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Solution Overview
Problem
Deduplicated memory systems suffer from high latency and slow performance due to read and write transaction amplification, particularly with deduplicated memory requiring multiple reads and writes for each request, which hinders responsiveness in memory-intensive systems.
Innovation Solution
A Transaction Manager is introduced to support multiple outstanding transactions, provide early write acknowledgments, and prioritize reads, utilizing a Write Coalescing Buffer, Read Data Mux, Write Data Buffer, Transaction Table, and Command Parser to manage and optimize write and read transactions, ensuring low latency and high throughput.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If deduplicated memory stores only a single copy of data objects, then storage efficiency is improved, but read and write latency increase due to multiple transactions required
Solution Approach 1:
The system performs preliminary actions by pre-establishing transaction tables and bitmaps before actual data access occurs. The transaction table pre-maps logical addresses to physical locations, and the bitmap pre-identifies valid data regions, enabling faster lookup during read/write operations without requiring sequential scanning of memory.
Solution Approach 2:
The patent introduces an intermediary transaction management layer between the host and memory subsystem. This intermediary uses transaction tables and bitmaps to coordinate and optimize multiple read/write operations, reducing the amplification effect by intelligently batching and prioritizing transactions before they reach the physical memory.
2Reliability
If multiple read and write transactions are executed for each request in deduplicated memory, then data consistency is maintained, but system responsiveness deteriorates
Solution Approach 1:
The system performs preliminary actions by pre-establishing transaction tables and bitmaps before actual data access occurs. The transaction table pre-maps logical addresses to physical locations, and the bitmap pre-identifies valid data regions, enabling faster lookup during read/write operations without requiring sequential scanning of memory.
Solution Approach 2:
The patent implements continuous transaction tracking using bitmaps that persist across multiple operations. By maintaining the bitmap state continuously and using it for subsequent transactions, the system avoids re-scanning and reduces the overhead of repeated consistency checks, thereby maintaining responsiveness while ensuring data consistency.
3Productivity
If a transaction table with page bitmap is introduced to manage transactions, then read and write amplification is reduced, but device complexity increases
Solution Approach 1:
The patent segments the transaction management structure into two simple components: a transaction table mapping logical addresses to physical locations, and a bitmap indicating valid data regions. This segmentation simplifies the overall structure compared to a monolithic transaction manager, making each component easier to implement and maintain while achieving the desired performance benefits.
Data Source
AI summary
A transaction manager for use with memory is described. The transaction manager can include a write data buffer to store outstanding write requests, a read data multiplexer to select between data read from the memory and the write data buffer, a command queue and a priority queue to store requests for the memory, and a transaction table to track outstanding write requests, each write request associated with a state that is Invalid, Modified, or Forwarded.