Transactional Execution Facility for Multiprocessor Atomicity

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Solution Overview

Problem

In multiprocessing environments, updating multiple storage locations simultaneously by multiple central processing units (CPUs) is challenging due to the need for serialization, which can lead to coarse-grained locking issues and potential deadlocks, and handling exception conditions is costly and complex.

Innovation Solution

A transactional execution facility that allows CPUs to perform a sequence of instructions as a single atomic operation, enabling block-concurrent storage accesses and providing nested transactional processing modes to manage updates and exceptions efficiently.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If lock words are used to serialize multiple storage location updates, then atomicity of updates is ensured, but the granularity of serialization becomes too coarse, leading to unnecessary serialization of entire queues even when only two elements are being updated

Engineering Contradiction:
Improveatomicity of updatesVSAvoidmultiprocessing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent divides the serialization mechanism into multiple lock words, each associated with a specific storage location or small group of locations. This segmentation allows different CPUs to access different lock words simultaneously, enabling fine-grained parallelism while maintaining atomicity for each individual update operation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each lock word provides serialization only for its associated storage location, creating local quality in the serialization scope. This means that serialization is applied only where needed (at the specific storage location being updated) rather than globally across all storage locations, thereby improving multiprocessing efficiency without sacrificing atomicity.

Inventive Principle:
Principle #3Local quality

2Productivity

If finer-grained serialization is implemented using a hierarchy of lock points, then multiprocessing efficiency is improved, but the system becomes vulnerable to deadlock situations and recovery issues

Engineering Contradiction:
Improvemultiprocessing efficiencyVSAvoidsystem stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements dynamic lock acquisition and release mechanisms where lock words are acquired and released in a controlled sequence. The system dynamically manages the state of multiple lock words, allowing CPUs to acquire locks in different orders based on their specific needs while maintaining overall system consistency through coordinated lock management.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent incorporates feedback mechanisms through status bits associated with each lock word that indicate the locked state. CPUs can query these status bits before attempting to acquire locks and can coordinate their lock acquisition strategies based on the current state of the system, thereby preventing deadlock situations while maintaining fine-grained parallelism.

Inventive Principle:
Principle #23Feedback

3Productivity

If multiple lock words are used for fine-grained serialization, then unnecessary serialization is reduced, but the complexity of managing multiple lock words and their associated status bits increases

Engineering Contradiction:
Improvemultiprocessing efficiencyVSAvoidlock management complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent combines multiple lock words and their associated status bits into a unified lock management structure. Each lock word is integrated with its corresponding status bits in a systematic way that allows for automated lock management, reducing the complexity of managing multiple separate locking mechanisms while still providing fine-grained serialization capabilities.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentEP2862083B1Processor assist facility
Publication Date: 2020.05.27 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • EP2862083B1 patent drawingFigure 1
  • EP2862083B1 patent drawingFigure 2A~3B
  • EP2862083B1 patent drawingFigure 4~5

AI summary

An operation is provided to signal a processor that action is to be taken to facilitate execution of a transaction that has aborted one or more times. The operation is specified within an instruction or is itself an instruction. The instruction is executed based on detecting an abort of the transactions, and includes a field indicating how many times the transaction has aborted. The processor uses this information to determine what action is to be taken.