Transactional Memory Address Watching via Read-Only Tracking

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing lock-based approaches for handling conflicts between threads accessing shared resources lead to performance loss due to unnecessary waiting for locks, while traditional transactional memory systems incur high computational overhead when used for address watching, failing to scale efficiently with increasing numbers of addresses.

Innovation Solution

Implement a second type of transaction in transactional memory systems where only read addresses are marked as trackable, omitting write addresses, and omit capturing architectural state on abort, allowing for efficient address watching and reduced computational burden.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If lock-based approach is used to control exclusive access to shared resources, then thread safety is ensured, but performance deteriorates due to unnecessary waiting for locks

Engineering Contradiction:
Improvethread safetyVSAvoidperformance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent replaces the mechanical lock-based synchronization system with a hardware transactional memory system that uses speculative execution and conflict detection. Instead of requiring threads to wait for locks, the system allows optimistic concurrent execution and only intervenes when actual conflicts are detected, thereby improving performance while maintaining thread safety.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the fundamental parameter of conflict handling from pessimistic (assume conflict always occurs) to optimistic (assume conflict rarely occurs). This parameter change enables threads to proceed without acquiring locks unless conflicts are detected, transforming the behavior from sequential to potentially parallel execution and improving productivity.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If traditional transactional memory systems are used for address watching, then conflict detection is achieved, but computational overhead increases

Engineering Contradiction:
Improveconflict detectionVSAvoidcomputational overhead
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts only the essential functionality needed for address watching from the full transactional memory system. Specifically, it extracts conflict detection capability while omitting the full transactional commit/abort mechanism, thereby reducing computational overhead while maintaining the core conflict detection function.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies partial action by implementing a reduced version of transactional memory that performs only the necessary conflict detection operations for address watching, rather than the complete transactional memory protocol. This partial implementation reduces computational overhead while still achieving the desired conflict detection capability.

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If full transactional memory operations are executed, then atomicity is ensured, but processing delay increases

Engineering Contradiction:
ImproveatomicityVSAvoidprocessing delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies partial action by implementing a reduced version of transactional memory that performs only the necessary conflict detection operations for address watching, rather than the complete transactional memory protocol. This partial implementation reduces computational overhead while still achieving the desired conflict detection capability.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentEP3887940B1Apparatus and data processing method for transactional memory
Publication Date: 2025.10.15 ARM LTD
  • EP3887940B1 patent drawingFigure 1
  • EP3887940B1 patent drawingFigure 2~3
  • EP3887940B1 patent drawingFigure 4~5

AI summary

In an apparatus (2) with transactional memory support circuitry (20), for a first type of transaction started using a first type of transaction start instruction, commitment of results of instructions executed speculatively following the first type of transaction start instruction are prevented until a transaction end instruction is reached. An abort is triggered when a conflict is detected between an address of a memory access from another thread and the addresses tracked for the transaction. For a second type of transaction started using a second type of transaction start instruction, an address of the read operation is marked as trackable whilst an address of a write operation is omitted from being marked as trackable. This allows an apparatus that supports transactional memory to also be used for multi-word address watching.