Transactional Memory Code Protection via Read-Only Regions
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Solution Overview
Problem
Current protection methods for Binary Translation (BT) and Just-In-Time (JIT) compilation, such as memory paging and segmentation, are ineffective and incur high overhead, making it difficult to protect dynamically generated code and data from malware attacks, especially when fine-grained memory modifications are needed for performance optimization.
Innovation Solution
The use of restricted transactional memory support in processors, which involves creating a memory map during BT/JIT conversion to identify read-only memory regions and employing a security monitoring thread that executes as a transaction to detect and prevent unauthorized access, thereby providing real-time code and data protection through memory bounds checking.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If memory paging and segmentation are used to protect BT/JIT code, then code protection is provided, but expensive hypervisor or OS operations are required and overhead is very high
Solution Approach 1:
The patent replaces the mechanical system of hypervisor/OS memory management operations with hardware-based transactional memory support. The processor's transactional memory hardware automatically enforces read-only constraints on code regions without requiring software-mediated page table operations, thereby eliminating the expensive hypervisor/OS overhead while maintaining protection.
Solution Approach 2:
The transactional memory system provides self-service protection by having the processor hardware automatically monitor and enforce memory access constraints. The security monitoring thread executes as a normal thread, and the hardware automatically detects violations of read-only constraints without requiring external intervention from hypervisors or operating systems.
2Reliability
If memory pages are marked as read-only for security, then protection is provided, but it is impossible to change these memory pages later without changing how BT or JIT output code is generated
Solution Approach 1:
The patent introduces dynamic control of memory protection by allowing the read-only constraint to be applied selectively to specific memory regions containing code rather than entire memory pages. The transactional memory system enables fine-grained control where individual memory regions can be marked as read-only during transaction execution, allowing other regions to remain modifiable. This dynamic approach resolves the contradiction by providing protection only where needed while maintaining flexibility elsewhere.
Solution Approach 2:
The patent applies local quality by enforcing read-only constraints only on specific memory regions containing BT/JIT generated code, rather than applying uniform protection to entire memory pages. The transactional memory system allows different memory regions to have different access constraints simultaneously, enabling code regions to be protected while data regions remain modifiable, thus providing both security and flexibility.
3Reliability
If large blocks of memory are defined as read-only, then security is enforced, but fine-grained memory access control is not achieved
Solution Approach 1:
The patent applies segmentation by dividing memory into fine-grained regions and applying read-only constraints to individual segments containing code rather than large memory pages. The transactional memory system enables the security monitoring thread to specify precise memory regions to monitor, allowing protection at the level of individual code segments or functions rather than entire 4096-byte pages, thus achieving fine-grained control.
Solution Approach 2:
The patent implements local quality by applying different access constraints to different memory regions at the same hierarchical level. The transactional memory system allows the security monitoring thread to mark specific memory regions as read-only while leaving other regions accessible, enabling precise control over which portions of memory require protection and which require modification capability.
Data Source
AI summary
A technique allows for memory bounds checking for dynamically generated code by using transactional memory support in a processor. The memory bounds checking includes creating output code, identifying read-only memory regions in the output code and creating a map that is provided to a security monitoring thread. The security monitoring thread executes as a transaction and determines if a transactional conflict occurs to the read-only memory region during parallel execution of a monitored thread in the output code.