Transceiver Circuit Adaptive Filtering for Low-Power PAM Interference Removal

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Solution Overview

Problem

Existing transceiver circuits face challenges in efficiently processing pulse amplitude modulation (PAM) signals across multiple modulation levels, particularly in ethernet networks, due to difficulties in managing interference and maintaining energy efficiency while adapting to varying network conditions.

Innovation Solution

A transceiver circuit with adaptive filtering and coefficient adaption units that apply scaling factors to coefficient signals, using interference symbols to select appropriate signals for interference removal, and employs a clock provision circuit to adjust clock frequencies based on network conditions, thereby enhancing flexibility and reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the coefficient adaption unit updates coefficient values at every network frequency cycle, then the interference removal accuracy is improved, but the power consumption increases

Engineering Contradiction:
Improveinterference removal accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The coefficient adaption unit updates coefficient values periodically at a coefficient frequency that is lower than the network frequency, rather than updating at every network cycle. This periodic updating approach maintains adequate interference removal accuracy while significantly reducing power consumption by allowing the adaptive filtering circuit to operate with stable coefficients over multiple network cycles.

Inventive Principle:
Principle #19Periodic action

2Speed

If the transceiver circuit uses a fixed high clock frequency for coefficient updates, then the processing speed is improved, but the energy efficiency deteriorates

Engineering Contradiction:
Improvecoefficient update speedVSAvoidenergy efficiency
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The clock provision circuit dynamically adjusts the coefficient clock frequency based on network conditions and operational phase. During initial link training, a higher coefficient frequency is used for faster adaptation, while during steady-state operation, the frequency is reduced to optimize energy efficiency. This dynamic frequency adjustment allows the system to balance processing speed and energy consumption according to actual needs.

Inventive Principle:
Principle #15Dynamics

3Reliability

If the adaptive filtering circuit processes all coefficient signals at network frequency, then the interference cancellation performance is improved, but the device complexity increases

Engineering Contradiction:
Improveinterference cancellation performanceVSAvoidprocessing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The processing is segmented into two distinct frequency domains: network frequency for signal reception and coefficient generation, and a lower coefficient frequency for coefficient updates. The adaptive filtering circuit processes interference symbols at network frequency to maintain cancellation performance, while the coefficient adaption unit operates at the lower coefficient frequency, reducing overall processing complexity and power consumption.

Inventive Principle:
Principle #1Segmentation

4Productivity

If the clock provision circuit provides clock signals at maximum frequency continuously, then the processing capability is improved, but the power consumption increases

Engineering Contradiction:
Improveprocessing capabilityVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The clock provision circuit changes the frequency parameter of the coefficient clock signal based on operational requirements. During link training phase, the coefficient clock frequency is set higher to enable faster coefficient adaptation. During normal data transmission, the frequency is reduced to minimize power consumption. This parameter adjustment allows the system to optimize the trade-off between processing capability and energy consumption dynamically.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250267049A1Transceiver circuit
Publication Date: 2025.08.21 NXP USA INC
  • US20250267049A1 patent drawing
  • US20250267049A1 patent drawing
  • US20250267049A1 patent drawing

AI summary

A transceiver circuit comprising: a transceiver clock input terminal to receive a transceiver clock signal defining a network frequency; a clock provision circuit to provide a coefficient clock signal, defining a coefficient frequency, and a coefficient adaption unit for providing a coefficient signal that represents one or more coefficient values. The coefficient adaption unit updates the one or more coefficient values at the coefficient frequency. The transceiver circuit also includes an adaptive filtering circuit that receives the coefficient signals at the network frequency, a filter input terminal to sequentially receive a stream of interference-symbols, and a filter output terminal to provide an interference-error signal to be removed from a network signal. The adaptive filtering circuit applies scaling factors to the coefficient signal to create scaled coefficient signals and uses the received interference-symbol to select one of the scaled coefficient signals to provide the interference-error signal.