Multi-Chip Transceiver Array Layout for High-Density PIC-EIC Integration
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Solution Overview
Problem
Current optical sensing technologies, such as OCT and CW LiDAR, face limitations in resolution due to the pitch of optoelectronic arrays and the integration of electronic circuits, which increases the size and power requirements of sensing devices, and struggle with achieving high density and yield in photonic integrated circuits (PICs) compared to electronic integrated circuits (EICs).
Innovation Solution
The integration of multiple photonic integrated circuits (PICs) on a common carrier substrate with closely coupled electronic integrated circuits (EICs) for compact, low-cost transceiver array devices, utilizing a scanner with rotating polyhedral mirrors and optics that accommodate field curvature to enhance scanning resolution and efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple optoelectronic components are integrated on a PIC substrate, then device functionality and sensing resolution are improved, but manufacturing complexity and yield challenges increase
Solution Approach 1:
The device is divided into separate functional modules: PIC substrate containing optoelectronic components, EIC substrate containing electronic circuit components, and a carrier substrate. This segmentation allows each module to be optimized and manufactured independently, then integrated through controlled die-to-wafer bonding, reducing overall manufacturing complexity while maintaining high sensing resolution
Solution Approach 2:
The carrier substrate acts as an intermediary platform that receives both the PIC substrate and EIC substrate, providing a common mounting surface and electrical interconnection interface. This intermediary structure simplifies the integration process by decoupling the complex bonding operations into manageable stages
2Volume of moving object
If electronic circuit components are integrated with optoelectronic components, then device size is reduced, but power consumption increases
Solution Approach 1:
The integration is achieved through three-dimensional stacking: PIC substrate and EIC substrate are bonded face-to-face in the vertical dimension, with electrical connections established through conductive vias penetrating the PIC substrate. This vertical integration reduces the horizontal footprint (device size) while allowing thermal management and power distribution to be optimized in the vertical dimension, mitigating power consumption increases
3Productivity
If photonic integrated circuits are manufactured with high density, then device performance is improved, but manufacturing yield decreases
Solution Approach 1:
The manufacturing process is segmented into independent fabrication stages for PIC and EIC substrates, allowing each to be optimized for its specific function. The PIC substrate can be manufactured with high-density photonic structures using specialized processes, while the EIC substrate is manufactured using standard high-yield semiconductor fabrication, thereby maintaining both high performance and high yield
Solution Approach 2:
Multiple PIC substrates can be manufactured in parallel on a single carrier wafer using wafer-scale fabrication techniques. The controlled die-to-wafer bonding process then transfers individual PIC devices to their final packaged form, enabling high-volume production with consistent quality and yield
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables high-resolution, compact, and efficient optical sensing with improved scanning density and reduced power consumption, addressing the limitations of existing technologies by integrating PICs and EICs for enhanced performance and precision.
Implementation Method 1
optical waveguides disposed on the PIC substrate
Implementation Method 2
the at least one of the optoelectronic components includes at least one coherent sensor, which is configured to mix a part of the output beam with incoming optical radiation that is incident on the at least one coherent sensor and to output signals in response to the mixed optical radiation
Implementation Method 3
the optical transmitter is configured to generate an output beam of coherent radiation
Implementation Method 4
utilizing a scanner with rotating polyhedral mirrors
Data Source
AI summary
An optoelectronic device (20, 90, 120) includes a photonic integrated circuit (PIC) (24, 92, 94, 126), which includes a PIC substrate (34), having a first side mounted on a carrier substrate (26, 96), first electrical connection pads (70, 130) on a second side of the PIC substrate, optical waveguides (52) on the PIC substrate, and electrical conductors (68, 134) disposed on the PIC substrate and connecting to one or more of the first electrical connection pads. At least one electronic integrated circuit (22, 100, 122, 124) includes a semiconductor substrate (74) having a third side mounted on the second side of the PIC substrate and second electrical connection pads (72, 128) on the semiconductor substrate in electrical communication with the first electrical connection pads. One or more electronic circuit components (76, 78, 80, 82) on the semiconductor substrate are connected electrically to the second electrical connection pads.