Transceiver Clock Lane Elimination via Signal Masking
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Solution Overview
Problem
In MIPI protocol-based display devices, the separate use of a clock lane increases physical and spatial costs, as well as power consumption.
Innovation Solution
A transceiver device that improves data transmission integrity by masking the internal clock signal without additional clock signal generation or memory usage, thereby reducing circuit complexity and costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a separate clock lane is used for clock signal transmission, then data transmission timing accuracy is improved, but physical cost and spatial occupation increase
Solution Approach 1:
The patent combines the clock signal and data signal into a single transmission lane. The transmitter embeds clock information within the data stream, and the receiver extracts the clock signal from the received data, eliminating the need for a separate physical clock lane while maintaining timing synchronization.
Solution Approach 2:
The data lane is designed to serve dual purposes: transmitting data information and carrying clock synchronization signals. The same physical medium performs multiple functions, reducing the total number of required transmission channels and associated spatial requirements.
2Stability of the object's composition
If a separate clock lane is used, then clock signal stability is improved, but power consumption increases
Solution Approach 1:
The clock signal is merged with the data signal in the same transmission channel. By embedding clock transitions within the data stream and using the receiver's clock recovery circuitry, the system maintains stable clocking without the additional power cost of a dedicated clock lane.
Solution Approach 2:
The receiver generates its own stable clock signal by extracting timing information from the incoming data stream. This self-generated clock serves the receiver's timing needs without requiring an external clock source or separate clock transmission path, reducing overall system power consumption.
3Reliability
If internal clock signal masking is implemented, then circuit complexity increases, but data transmission integrity is improved
Solution Approach 1:
The patent extracts the clock signal from the combined data-clock stream at the receiver side. By separating the clock extraction function into a dedicated clock recovery circuit, the masking complexity is localized to specific circuit blocks rather than affecting the entire system, managing complexity while ensuring integrity.
Solution Approach 2:
The patent introduces a clock recovery circuit as an intermediary component that processes the combined signal and separates the clock information. This intermediary handles the complexity of clock extraction and masking, isolating the complexity to a manageable subsystem while preserving overall data transmission integrity.
Data Source
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AI summary
A transceiver device includes a transmitter and a receiver connected to each other through a first line and a second line. The transmitter transmits signals having a first voltage range to the first line and the second line in a first mode, and transmits signals having a second voltage range less than the first voltage range to the first line and the second line in a second mode. The transmitter encodes an original payload to generate a first payload in the second mode, and transmits a clock training pattern and the first payload through the first line and the second line. The receiver decodes the first payload and outputs reception data corresponding to the original payload in the second mode.