Transceiver Encoding Method for Clock Recovery and Data Rate
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Solution Overview
Problem
The existing data transmission technologies, such as PAM4, face a challenge in minimizing overhead packets while maintaining frequent data transitions, which leads to a decrease in actual data transmission rate due to the need for generating clock signals using transmitted data.
Innovation Solution
A transceiver system with a transmitter and receiver configuration that includes two encoders and a transmission driver, where the encoders generate encoded data differently during alternating periods, minimizing catalyst packet generation and ensuring frequent data transitions through XOR operations, thereby reducing overhead packets.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If encoding is performed to generate frequent data transitions for clock signal generation, then clock signal generation is enabled, but overhead packets increase and actual data transmission rate decreases
Solution Approach 1:
The data transmission is divided into two independent channels: a first channel transmitting original data without encoding overhead, and a second channel transmitting encoded data with catalyst packets for clock signal generation. This segmentation allows each channel to serve its specific function without interfering with the other, thereby maintaining high data transmission rate while enabling clock signal generation.
Solution Approach 2:
The patent introduces a catalyst packet as an intermediary element in the second data channel. These catalyst packets are specifically designed to generate frequent transitions for clock signal generation without affecting the original data transmission in the first channel. The catalyst packets act as a mediator that enables clock recovery while minimizing impact on overall transmission efficiency.
2Speed
If catalyst packets are generated frequently to ensure data transitions, then frequent transitions are achieved, but overhead packet ratio increases
Solution Approach 1:
The patent implements periodic insertion of catalyst packets at predetermined intervals in the second data channel. This periodic action ensures that frequent transitions occur at regular intervals, which is sufficient for clock signal generation. By using periodic rather than continuous catalyst packet insertion, the overhead ratio is minimized while still achieving the required transition frequency for reliable clock recovery.
3Productivity
If two data channels are used to transmit different encoded data, then overhead packets are minimized in each channel, but system complexity increases
Solution Approach 1:
The patent merges two data channels at the transmitter side, where the first data channel carries original data and the second data channel carries encoded data with catalyst packets. At the receiver side, these two channels are combined to reconstruct the original data. This merging approach allows the system to benefit from both channels' optimized transmission while managing complexity through integrated processing.
Solution Approach 2:
The second data channel serves multiple functions: it transmits encoded version of the data for error resilience, inserts catalyst packets for clock signal generation, and maintains synchronization information. This multi-functionality reduces the need for separate dedicated channels for each purpose, thereby minimizing overall system complexity while achieving multiple objectives.
Data Source
AI summary
A transceiver of the present inventive concept includes a transmitter and a receiver connected by a first line and a second line, and the transmitter includes a first encoder; a second encoder; and a transmission driver. The first encoder generates a first encoded data different from a first data during a first period and the second encoder generates a second encoded data equal to a second data during the first period, the second encoder generates the second encoded data different from the second data during a second period and the first encoder generates the first encoded data equal to the first data during the second period, and the first period and the second period are arranged to alternate with each other.