Transceiver Harmonic Compensation for Fractional RF Suppression
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Solution Overview
Problem
Existing transceiver architectures struggle to effectively suppress fractional RF harmonics generated when the voltage control oscillator operates at a non-integral multiple of the radio frequency, leading to issues with Federal Communications Commission (FCC) security certifications.
Innovation Solution
A transceiver design incorporating a transmitter, compensation circuit, power combiner, receiver, and digital baseband circuit to generate and control a compensation signal that cancels out fractional RF harmonics by combining it with the main signal, utilizing feedback to adjust the compensation signal's magnitude.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the VCO operates at a non-integral multiple of the radio frequency to avoid frequency pulling, then frequency pulling is suppressed, but fractional RF harmonics are generated
Solution Approach 1:
The patent generates a compensation signal at the same fractional harmonic frequency as the harmful signal, then combines them with opposite phases to cancel the harmful harmonic. This converts the harmful fractional RF harmonic into a beneficial cancellation mechanism by using the same frequency component against itself.
Solution Approach 2:
The compensation signal is generated in advance with the same frequency as the expected harmful harmonic but with opposite phase. This preliminary anti-action is combined with the main signal before transmission, preventing the harmful harmonic from being radiated in the first place.
2Reliability
If a divider with non-integral divisor is used to generate local oscillation signal, then frequency pulling problem is solved, but fractional RF harmonics are generated affecting FCC certifications
Solution Approach 1:
The patent captures the fractional harmonic signal that would otherwise be harmful and uses it to generate a compensation signal. By combining this compensation signal with the main signal, the harmful harmonic is canceled, enabling FCC certification compliance while maintaining the non-integral divisor architecture.
Solution Approach 2:
The compensation circuit acts as an intermediary that processes the fractional harmonic frequency and generates a counter-phase signal. This intermediary mechanism enables the system to maintain the beneficial non-integral divisor operation while eliminating the harmful effects through signal combination.
Data Source
AI summary
A transceiver and a method for suppressing a harmonic signal in a transceiver are provided. The transceiver includes a transmitter, a compensation circuit, a power combiner, a receiver and a digital baseband circuit. The transmitter outputs a transmitted signal, wherein the transmitted signal includes a main signal having a frequency equal to frf and the harmonic signal having a frequency equal to (N×ff), and N is a non-integer less than one. The compensation circuit outputs a compensation signal having a frequency equal to (N×frf). The power combiner combines the transmitted signal and the compensation signal to generate a combined signal. The receiver receives the combined signal and suppresses the main signal within the combined signal to generate a feedback signal. The digital baseband circuit controls a magnitude of the compensation signal according to a magnitude of the feedback signal.