Radio Transceiver Calibration for IM2 and IM3 Linearity Drift
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Solution Overview
Problem
Direct-conversion receivers face linearity challenges due to temperature variations and process corners, which degrade the performance of passive mixers, particularly in full-duplex operation modes with limited duplexer isolation, where existing calibration techniques fail to maintain both second- and third-order intermodulation intercept points effectively.
Innovation Solution
A calibration methodology that adjusts common-mode voltage using a CTAT voltage node and biases bulk terminal voltages to reduce intermodulation products, employing a VCM calibration circuit and bulk terminal calibration circuit to maintain OIP3 and OIP2 performances across temperature variations and process corners.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an off-chip surface acoustic wave (SAW) filter is utilized between the LNA and the mixer to suppress out-of-band blockers, then linearity performance is improved, but bill of materials and design complexity increase
Solution Approach 1:
The patent extracts the linearity enhancement function from the external SAW filter and implements it within the receiver chain using the mixer's calibration circuitry. The common-mode voltage calibration and bulk terminal biasing techniques internally generate the filtering effect without requiring external components, thereby removing the SAW filter from the bill of materials while maintaining linearity performance.
Solution Approach 2:
The calibration circuits originally designed for linearity optimization are made multi-functional by enabling them to perform both their primary calibration function and the secondary function of suppressing out-of-band blockers. The common-mode voltage control and bulk terminal biasing simultaneously optimize intermodulation performance and provide selective signal suppression, eliminating the need for dedicated filtering components.
2Reliability
If double-balanced passive mixers are used to achieve high linearity, then even-order and odd-order linearity performances are improved, but linearity performances degrade over temperature and process corners
Solution Approach 1:
The patent implements dynamic adjustment of the mixer's operating parameters through temperature-dependent common-mode voltage calibration and bulk terminal biasing. The calibration circuits continuously adapt the mixer's linearity characteristics based on temperature conditions, transforming the static mixer into a dynamically optimized component that maintains high linearity performance across temperature variations and process corners.
Solution Approach 2:
The patent changes the electrical parameters (common-mode voltage and bulk terminal voltages) of the passive mixer based on temperature and process conditions. By adjusting these parameters through calibration circuits, the mixer's linearity performance is optimized for each operating condition, compensating for temperature-induced degradation and process corner variations.
3Ease of manufacture
If device mismatches are present in differential circuits, then manufacturing is simplified, but even-order non-linearity increases
Solution Approach 1:
The patent implements feedback-based calibration where the even-order intermodulation products are measured and used to adjust the bulk terminal voltages of the differential pair devices. This closed-loop calibration process compensates for device mismatches by optimizing the operating point, thereby suppressing even-order non-linearity while maintaining manufacturing simplicity without requiring ultra-precise device matching.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed calibration method effectively maintains high OIP3 and OIP2 performances over a wide temperature range (-30 to 105°C), reducing intermodulation products and enhancing receiver sensitivity by independently biasing VBP and VBN voltages and ensuring CTAT characteristics for VCM voltage.
Implementation Method 1
adjusting a common-mode voltage (VCM) at one or more nodes of the RF circuit, using a VCM calibration circuit, to reduce the IM3 to a second predetermined level
Implementation Method 2
biasing one of a VBP and VBN voltages, using a bulk terminal calibration circuit, of a first bulk terminal of one or more transistors of the RF circuit to reduce the IM2
Data Source
AI summary
Disclosed are example embodiments of methods and systems for calibrating the second and third order intermodulation intercept points of a radio transceiver. The calibration circuit comprises: a common mode voltage (VCM) calibration circuit having a complementary to absolute temperature (CTAT) voltage node coupled to one or more VCM nodes of the radio transceiver, wherein the VCM calibration circuit is configured to adjust the CTAT voltage to reduce a third-order intermodulation (IM3) at an output of the radio transceiver; and a bulk terminal calibration circuit configured to bias one of a VBP and VBN voltages at one or more bulk terminals of one or more transistors of the RF circuit to reduce a second-order intermodulation (IM2).