Transceiver Self-Test Circuit for Jitter Tolerance
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Solution Overview
Problem
Current high-speed communication equipment is expensive and lacks flexibility in testing jitter tolerance, particularly for multi-channel data collection and higher data rates, as it requires multiple test devices and has upper data rate limits.
Innovation Solution
A transceiver circuit with a transmitter, receiver, and loopback path, along with a test control circuit that introduces jitter during self-test mode to assess jitter tolerance without external equipment, allowing for cost-effective testing across various data rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If external jitter injection equipment (e.g., Agilent J-BERT) is used to test jitter tolerance, then testing capability and measurement precision are improved, but device cost increases significantly (approximately $300K/channel for 40 Gbs)
Solution Approach 1:
The transceiver circuit performs self-testing by incorporating an internal jitter injection mechanism that can introduce controlled jitter into the transmitted signal. The test control circuit enables the transmitter to inject jitter and the receiver to process the signal, allowing the system to evaluate its own jitter tolerance without requiring external specialized equipment. This self-service approach eliminates the need for expensive external testers while maintaining measurement capability.
Solution Approach 2:
The transceiver circuit is designed to perform both its primary communication function and self-testing functions. The same transmitter and receiver circuits are used for both normal data transmission and jitter tolerance testing, with the test control circuit enabling the system to switch between operational modes. This multi-functionality eliminates the need for separate dedicated testing equipment.
2Adaptability or versatility
If multiple separate test devices are used to inject different types of jitter, then comprehensive testing capability is improved, but device complexity and ease of operation deteriorate due to labor-intensive setup and lack of flexibility
Solution Approach 1:
The patent combines multiple jitter injection capabilities into a single integrated test control circuit within the transceiver. Instead of requiring separate external devices for injecting different jitter types (random jitter, sinusoidal jitter, periodic jitter), the internal test control circuit can generate and inject various jitter types through the transmitter's existing signal generation pathways. This merging of functions simplifies the testing setup and improves ease of operation.
Solution Approach 2:
The test control circuit is designed to dynamically adjust jitter injection parameters including jitter type, amplitude, and frequency characteristics. The circuit can adaptively modify these parameters based on testing requirements, allowing comprehensive jitter tolerance evaluation without manual reconfiguration of multiple separate devices. This dynamic adjustment capability provides flexibility while maintaining operational simplicity.
3Measurement precision
If existing high-speed bench equipment is used for jitter tolerance testing, then measurement precision is improved, but the equipment has upper data rate limits and cannot test higher data rate products (e.g., 28 Gbs)
Solution Approach 1:
The transceiver circuit uses its own internal parameters and signal generation capabilities to perform jitter injection and tolerance testing. By changing the operating parameters of the transmitter and receiver circuits themselves, the system can test jitter tolerance across its full supported data rate range without being constrained by the data rate limitations of external bench equipment. The test control circuit adjusts internal signal characteristics to match different data rate requirements.
4Measurement precision
If manual jitter injection methods (e.g., connecting different trace lengths) are used to inject ISI jitter, then testing capability is achieved, but productivity and ease of operation deteriorate due to labor-intensive procedures
Solution Approach 1:
The patent replaces manual mechanical methods of jitter injection (such as physically connecting different trace lengths to create ISI jitter) with an electronic control-based approach. The test control circuit electronically generates and injects controlled amounts of ISI jitter through the transmitter's signal processing pathways. This substitution of mechanical procedures with electronic control significantly improves productivity and testing efficiency while maintaining measurement precision.
Data Source
AI summary
A transceiver circuit for self-test of jitter tolerance is disclosed. The transceiver circuit includes a transmitter circuit having an output coupled to an output terminal of the transceiver and a receiver circuit having in input coupled to an input terminal of the transceiver. The transceiver also includes a loopback path configured to provide a signal transmitted by the transmitter circuit to the input of the receiver circuit. The transceiver also includes a test control circuit that causes jitter to be introduced in the signal transmitted by the transmitter circuit when the test control circuit is operating in a self-test mode, but not when the test control circuit is operating in a non-test mode.