High Speed Transceiver Low Data Rate Reception
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Solution Overview
Problem
High-speed transceivers face complexity and cost issues when receiving lower data rate transmissions due to the need for external comma detection and alignment circuits, which complicates clock correction and elastic storage, especially when operating outside their designed serial bit rate range.
Innovation Solution
A high-speed transceiver with an oversampling module and data recovery system that processes a unique alignment sequence and data stream to determine word alignments, allowing for aligned data recovery at lower data rates with minimal external components by comparing oversampled sequences with expected patterns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If external comma detection and alignment circuits are used for lower data rates, then the transceiver can receive lower data rate transmissions, but the device complexity and cost increase
Solution Approach 1:
The patent merges the comma detection and alignment functions into the existing transceiver module by utilizing the oversampled data stream and the existing deserializer. The deserializer is configured to detect comma characters and perform alignment using the oversampled data, eliminating the need for separate external circuits. This integration reduces device complexity and cost while maintaining the ability to receive lower data rate transmissions.
Solution Approach 2:
The patent makes the existing deserializer multi-functional by enabling it to perform both normal high-speed data deserialization and low-speed comma detection and alignment. The deserializer is configured to operate in different modes depending on the data rate, serving both high-speed and low-speed communication requirements without requiring separate dedicated circuits for each function.
2Adaptability or versatility
If external comma detection and alignment circuits are used for lower data rates, then the transceiver can receive lower data rate transmissions, but the clock correction and elastic storage become unusable
Solution Approach 1:
The patent merges the clock correction and elastic storage functions back into the transceiver module by utilizing the oversampled data stream and the existing deserializer. The deserializer is configured to provide aligned data that enables the elastic storage and clock correction circuits to function properly at lower data rates. This integration ensures that clock correction and elastic storage remain usable while supporting lower data rate transmissions.
Solution Approach 2:
The patent implements feedback mechanisms where the deserializer uses the oversampled data to detect comma characters and generate alignment signals that feed back to the elastic storage and clock correction circuits. This feedback enables the circuits to adjust their operation based on the actual data stream characteristics, maintaining reliable clock correction and elastic storage functionality at lower data rates.
3Adaptability or versatility
If each serial bit is replicated multiple times for oversampling, then the transceiver can receive lower data rates, but the number of required comma detection circuits and alignment circuits increases
Solution Approach 1:
The patent merges the comma detection and alignment functions into the existing transceiver module by utilizing the oversampled data stream and the existing deserializer. The deserializer is configured to detect comma characters and perform alignment using the oversampled data, eliminating the need for separate external circuits. This integration reduces device complexity and cost while maintaining the ability to receive lower data rate transmissions.
Solution Approach 2:
The patent makes the existing deserializer multi-functional by enabling it to perform both normal high-speed data deserialization and low-speed comma detection and alignment. The deserializer is configured to operate in different modes depending on the data rate, serving both high-speed and low-speed communication requirements without requiring separate dedicated circuits for each function.
Data Source
AI summary
A high speed transceiver operable to receive lower data rate transmissions includes an oversampling module and a data recovery system. The oversampling module is operably coupled to oversample a unique alignment sequence and data of a data stream received at a first data transmission to produce an oversampled unique alignment sequence and oversampled data, respectively, wherein the first data transmission rate is less than a serial bit rate of the high speed transceiver. The data recovery system is operably coupled to: compare a portion of the oversampled unique alignment sequence with an expected oversampled partial alignment sequence; when the comparing the portion of the oversampled unique alignment sequence with the expected oversampled partial alignment sequence is favorable, determine one of a plurality of word alignments for the data stream based on the portion of the oversampled unique alignment sequence; and recover aligned data at the first data transmission rate from the oversampled data based on the one of the plurality of word alignments.