Half-Duplex Transceiver Switch Topology for Impedance Matching
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Solution Overview
Problem
Existing switch arrangements in communication devices face challenges in efficiently providing impedance matching between transmit and receive paths, leading to suboptimal signal transmission and reception, particularly in half-duplex communication systems.
Innovation Solution
A switch arrangement comprising a transceiver node coupled to first and second circuit branches, where the first branch includes an inductor and a semiconductor switch for switched coupling to a reference voltage, and the second branch includes semiconductor switches and an amplifier for controlling supply voltage and bias current to achieve impedance matching through CLC and parallel LC tank circuits in different switch modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional switch arrangements are used to select between transmit and receive paths, then basic switching function is achieved, but impedance matching between transceiver node and transmit/receive nodes is suboptimal
Solution Approach 1:
The circuit is divided into two separate branches: a first circuit branch containing an inductor and first semiconductor switch, and a second circuit branch containing semiconductor switches and an amplifier. This segmentation allows independent optimization of impedance matching for transmit and receive paths without increasing overall device complexity.
Solution Approach 2:
The patent employs dynamic switching between different circuit configurations using semiconductor switches. In the first switch mode, the first semiconductor switch is open and the second/third switches provide capacitance for impedance matching. In the second switch mode, the first semiconductor switch is closed and couples the inductor to reference voltage, while the second/third switches couple the inductor to reference voltage via capacitance. This dynamic reconfiguration optimizes impedance matching for different operational states.
2Productivity
If impedance matching is optimized for one path (transmit or receive), then signal transmission or reception is improved, but the other path becomes unavailable due to half-duplex operation
Solution Approach 1:
The circuit components (inductor, capacitors, amplifier) are pre-configured in both branches to provide immediate impedance matching capability when switching occurs. The amplifier is kept in standby with controlled supply voltage application, and bias currents are pre-positioned, allowing rapid transition between transmit and receive modes without significant settling time.
Solution Approach 2:
The system operates in periodic half-duplex mode, alternating between transmit and receive states. The semiconductor switches are controlled to periodically reconfigure the circuit between the two switch modes, enabling time-division multiplexing of the antenna resource while maintaining optimal impedance matching in each state.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables efficient impedance matching between the transceiver node and either the transmit or receive node, depending on the switch mode, thereby improving signal transmission and reception in half-duplex communication devices by reducing impedance mismatch and optimizing signal flow.
Implementation Method 1
substantially providing for impedance matching between the transceiver node and the one of the transmit node and the receive node
Implementation Method 2
the first semiconductor switch is open and thereby configured to provide a capacitance in parallel with the inductor and the one of the second and third semiconductor switches
Implementation Method 3
the one of the second and third semiconductor switches or the further semiconductor switch are configured to couple the inductor, in parallel, to the reference voltage via a capacitance
Data Source
AI summary
A switch arrangement comprising:a transceiver node coupled to a first and second circuit branch, the first circuit branch including a transmit node, the second circuit branch including a receive node;wherein the first circuit branch comprises an inductor coupled in series and a first semiconductor switch, in parallel, configured to provide a switched coupling to a reference voltage; andwherein the second circuit branch comprises one of:i) a second and third semiconductor switch; andii) a second semiconductor switch and a third semiconductor switch configured to control the application of a supply voltage to an amplifier; andiii) a further semiconductor switch configured to control the application of a bias current to an amplifier; whereinin the first switch mode, impedance matching between the transceiver node and transmit node is provided;in the second switch mode, impedance matching between the transceiver node and receive node is provided.