Radio Transceiver Frequency Synthesizer Phase Noise Reduction
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Solution Overview
Problem
Current frequency synthesizer technologies, such as phase-locked loops driven by crystal oscillators, are not viable for generating local oscillator signals at higher frequencies like 60 GHz due to phase-noise widening issues, making it difficult to efficiently generate LO signals for multi-RAT transceivers operating in various frequency bands.
Innovation Solution
A radio transceiver design that uses a first LO signal generated by a clock-signal generator for a first RAT as a reference oscillation signal for a second RAT's clock-signal generator, allowing for higher frequency reference oscillation signals and increased PLL loop bandwidth to mitigate phase noise, while a control unit adjusts settings to maintain the second LO signal during frequency changes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional frequency synthesizer technologies (phase-locked loops driven by crystal oscillators) are used to generate local oscillator signals, then the system can operate at lower frequencies (0.5-5 GHz), but it becomes impossible to generate LO signals at higher frequencies (e.g., 60 GHz) due to phase-noise widening issues
Solution Approach 1:
The frequency synthesizer is divided into multiple independent PLL circuits, each optimized for specific frequency ranges. The first PLL generates LO signals for lower frequencies (0.5-5 GHz) while the second PLL generates LO signals for higher frequencies (e.g., 60 GHz), allowing each segment to operate within its optimal performance characteristics without phase-noise widening issues
Solution Approach 2:
The system transitions from a single-dimensional frequency generation approach to a multi-dimensional architecture where different reference oscillators and PLL circuits are employed for different frequency bands. This dimensional expansion in the frequency generation space enables operation across both low and high frequency ranges simultaneously
2Device complexity
If a single reference oscillator is used for all transceiver circuits, then the device complexity is reduced, but the ability to generate multiple LO signals across wide frequency ranges efficiently is compromised
Solution Approach 1:
Each PLL circuit is designed to serve multiple functions within its frequency range, generating multiple LO signals needed for different transceiver circuits operating in that band. The first PLL serves cellular RATs while the second PLL serves high-frequency RATs, with each being universal for its designated frequency domain
Solution Approach 2:
The system dynamically selects which PLL circuit to use based on the required frequency range and operational mode. The control mechanism activates the appropriate PLL (first or second) depending on whether low-frequency or high-frequency LO signals are needed, optimizing performance for each operational scenario
3Adaptability or versatility
If the first LO frequency is changed to accommodate different cellular RATs, then the adaptability to different networks is improved, but the second LO signal frequency may be affected, requiring additional control mechanisms
Solution Approach 1:
The control unit continuously monitors the first LO frequency and provides feedback to adjust the second PLL's reference oscillator or divider ratios accordingly. When the first LO frequency changes to accommodate different cellular RATs, the feedback mechanism automatically compensates to maintain the second LO signal at its required frequency for high-frequency RATs
Solution Approach 2:
The control unit is pre-configured with knowledge of frequency relationships between different RATs and LO signals. Before switching between operational modes, the control unit preliminarily adjusts the second PLL settings in anticipation of the first LO frequency change, preventing disruption to the second LO signal
Data Source
AI summary
A radio transceiver is disclosed. It comprises a first transceiver circuit and a second transceiver circuit, the latter requiring an LO signal having higher LO frequency than the former. It further comprises a frequency synthesizer comprising a first clock-signal generator adapted to generate the LO signal for the first transceiver circuit based on a first reference oscillation signal and a second clock-signal generator adapted to generate the LO signal for the second transceiver circuit based on a second reference oscillation signal, which is or is derived from the LO signal for the first transceiver circuit. A radio communication apparatus comprising the radio transceiver is also disclosed.