Controlled Transconductance Circuit for Fine Linear Delay Control
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Solution Overview
Problem
Existing electronic circuits face challenges in precisely controlling propagation delay, which is crucial for high-speed digital applications like phased locked loops, due to limitations in adjusting output current and load capacitance.
Innovation Solution
A controlled transconductance circuit (CTC) is developed, incorporating a variable capacitor connected to a transistor's source terminal, where the transconductance is adjusted by a control signal to control the propagation delay, enabling fine resolution and high-speed linear delay in digital circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional methods of adjusting output current and load capacitance are used, then propagation delay can be controlled, but the control precision is insufficient for high-speed digital applications
Solution Approach 1:
The patent changes the parameter of transconductance (gm) by introducing a variable capacitor connected to the source terminal of the transistor. The capacitance value of this variable capacitor can be adjusted to precisely control the transconductance, thereby achieving fine-resolution propagation delay control in the femto-second range. This parameter change approach enables continuous and precise adjustment of the delay characteristic without sacrificing control capability.
2Measurement precision
If transconductance is adjusted to control propagation delay, then delay precision improves, but the circuit complexity increases
Solution Approach 1:
The variable capacitor is nested within the existing transistor circuit structure, connected to the source terminal. This integration allows the delay control function to be embedded within the conventional circuit architecture without requiring separate control circuits or additional complex structures. The nested approach achieves precise delay control while minimizing the increase in overall circuit complexity.
Solution Approach 2:
Instead of adding complex control mechanisms, the patent achieves precise delay control by simply changing the capacitance parameter of the variable capacitor. This single parameter change approach provides fine-resolution delay adjustment (femto-second range) without introducing complex control logic or multiple additional components, thereby limiting the increase in circuit complexity.
3Measurement precision
If fine resolution delay control is implemented, then linearity of delay adjustment improves, but the speed of control response may be compromised
Solution Approach 1:
The variable capacitor enables continuous adjustment of the transconductance parameter, providing continuous and linear control of the propagation delay. This continuous action approach ensures that the delay can be adjusted smoothly without discrete steps, achieving fine resolution and high linearity. The continuous nature of the capacitance adjustment maintains fast response speed by avoiding the need for complex digital-to-analog conversion or multiple switching operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution allows for precise control of propagation delay within femto-second ranges, enhancing the performance of digital phased locked loops and delay locked loops by linearly adjusting transconductance in response to control signals, improving delay precision and linearity.
Implementation Method 1
a variable capacitor (106) connected between a source terminal (102-1) of the transistor and a constant voltage terminal (110), wherein a capacitance of the variable capacitor (106) is adjusted by the control signal (109)
Data Source
Figure 1.1~1.2
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Figure 1.4
AI summary
A controlled transconductance circuit (CTC) is disclosed. The CTC includes (i) a transistor comprising a drain terminal, a gate terminal, and a transistor source terminal, (ii) a biasing circuit element connected between the transistor source terminal and a CTC source terminal, and a variable capacitor connected between the transistor source terminal and a constant voltage terminal where the constant voltage terminal is adapted to receive a constant voltage, and (iii) a CTC control terminal adapted to control a transconductance of the CTC by controlling a capacitance of the variable capacitor.