Transfer Molded Power Module Pin Layout for Isolation and Low Inductance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor device modules face issues such as signal pin deformation or breakage during insertion, increased module dimensions for electrical isolation, high stray inductance due to single leadframe current flow paths, and reliability concerns from thermo-mechanical stresses and inconsistent adhesive layers during attachment to thermal-dissipation appliances.
Innovation Solution
The solution involves arranging signal pins and power tabs on a primary surface of the module rather than along the edge, using pre-molded signal pins with spring portions and mechanical stops to prevent deformation, and attaching the substrate to a thermal-dissipation appliance first to avoid adhesive issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If signal pins are arranged along the edge of the module, then electrical isolation spacing can be achieved, but module dimensions increase and thermo-mechanical stresses increase
Solution Approach 1:
The patent transitions from arranging signal pins along the edge (one-dimensional arrangement) to arranging them on the primary surface (two-dimensional arrangement). This dimensional change allows signal pins to be positioned in a grid-like pattern on the flat surface, achieving electrical isolation through spatial separation in multiple directions rather than requiring increased linear dimensions along the edge.
2Ease of operation
If signal pins are bent to facilitate insertion into PCB, then ease of insertion is improved, but deformation or breakage occurs during insertion
Solution Approach 1:
The patent pre-molds the signal pins with spring portions during the module manufacturing process, creating a built-in flexible structure that can elastically deform during insertion. This preliminary structural preparation eliminates the need for post-manufacturing bending operations, as the spring portions are already configured to accommodate insertion forces through elastic deformation rather than plastic bending.
3Ease of manufacture
If single body stamping process is used for leadframe, then manufacturing complexity is reduced, but stray inductance increases due to current flow path
Solution Approach 1:
The patent divides the leadframe into multiple separate components: a substrate and individual signal pins that are attached separately. This segmentation allows the current paths to be optimized independently - the substrate provides a low-inductance plane while the signal pins provide direct vertical connections. The separation eliminates the high-stray-inductance current loops that would exist in a single continuous stamped leadframe structure.
4Temperature
If power module is attached to thermal-dissipation appliance after package assembly, then thermal management is achieved, but adhesive layer consistency deteriorates and voids increase
Solution Approach 1:
The patent performs the substrate attachment to the thermal-dissipation appliance as a preliminary step before completing the package assembly. By attaching the substrate first when the package is still relatively flat and accessible, the adhesive layer can be applied uniformly without the warping and geometric complications that arise after full assembly. This preliminary attachment sequence ensures consistent adhesive thickness and minimizes void formation.
5Strength
If thermal processing is used for attachment to thermal-dissipation appliance, then bonding strength is improved, but internal solder re-melting occurs
Solution Approach 1:
The patent modifies the attachment process parameters by using eutectic solder with a lower melting point that is specifically selected to melt during the attachment thermal cycle, forming reliable bonds. The process temperature and time parameters are precisely controlled to ensure the solder reflows and creates strong metallurgical bonds between the substrate and thermal-dissipation appliance without causing damage to other sensitive components.
Data Source
AI summary
In a general aspect, an electronic device assembly includes a substrate arranged in a plane. The substrate has a first side and a second side, the second side being opposite the first side. The assembly also includes a plurality of semiconductor die disposed on the first side of the substrate and at least one signal pin. The at least one signal pin includes a proximal end portion coupled with the first side of the substrate, a distal end portion, and a medial portion disposed between the proximal end portion and the distal end portion. The medial portion is pre-molded in a molding compound, the proximal end portion and the distal end portion exclude the molding compound. The at least one signal pin is arranged along a longitudinal axis that is orthogonal to the plane of the substrate.