Transferrable Pillar Structure for Fanout Package Interconnect Bridge
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Solution Overview
Problem
Current methods for creating high-aspect ratio interconnections in semiconductor packaging, such as using Cu balls or plated Cu pillars, face limitations in achieving precise height control and dense packing of I/O signals, especially for heterogeneous integration of multiple chips with different heights and pitches.
Innovation Solution
The development of transferrable pillar structures, formed by etching a capping material layer, conductive plug, and attach material layer on a template wafer, which can be vertically joined and transferred to form high-aspect ratio structures with precise lithography-controlled heights, enabling flexible and dense interconnect bridges for fanout packages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional methods (Cu balls or plated Cu pillars) are used to create high-aspect ratio interconnections, then interconnect structures can be formed, but precise height control and dense packing of I/O signals cannot be achieved
Solution Approach 1:
The pillar structures are pre-formed on a template wafer with precise lithography-defined heights before transfer to the final substrate. This preliminary formation on a dedicated template allows precise height control to be achieved independently of the final assembly process, resolving the contradiction between precision and manufacturing complexity
Solution Approach 2:
A template wafer is introduced as an intermediary substrate that hosts the pillar formation process separately from the final device assembly. This intermediary allows precise pillar fabrication using specialized lithography techniques, which can then be transferred to the target substrate, achieving height precision without complicating the overall manufacturing flow
2Adaptability or versatility
If more I/O signals are provided on shrinking dies to integrate more function, then chip functionality increases, but pad array density requirements become increasingly stringent
Solution Approach 1:
The invention transitions from planar pad arrays to three-dimensional pillar structures that extend vertically from the substrate. This dimensional change allows I/O signals to be packed more densely by utilizing the vertical dimension, enabling increased chip functionality without further shrinking the die area and thus maintaining manageable pad array density requirements
3Adaptability or versatility
If heterogeneous integration of multiple chips with different heights and pitches is performed, then system integration capability improves, but interconnection structure complexity increases
Solution Approach 1:
The template wafer allows different pillar structures with varying heights, materials, and geometries to be formed at different locations to match specific interconnection requirements. This local customization enables heterogeneous integration of multiple chips with different specifications while maintaining a unified manufacturing process, thus improving integration capability without proportionally increasing overall structure complexity
Solution Approach 2:
The interconnection system is segmented into modular pillar units that can be independently designed and formed on the template wafer. Each pillar can be tailored to specific height and pitch requirements, allowing flexible accommodation of different chip specifications in heterogeneous integration while keeping the overall system manageable through modular design
Data Source
AI summary
A pillar structure is provided. The pillar structure includes a plurality of pillars. Each of the pillars include a capping material layer formed in a pit etched into a template wafer, a conductive plug formed on the capping material layer, a base layer formed on the conductive plug, and an attach material layer formed on the base layer. The pillars are joined vertically together to form the pillar structure.