Multilayer Transformer Coil Layout for Low-Warpage Semiconductors

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Solution Overview

Problem

The semiconductor device in existing technologies experiences significant warping due to the formation of transformers with large amounts of warping, which affects the structural integrity and functionality.

Innovation Solution

The semiconductor device incorporates a multilayer wiring layer with specific coil configurations and metal film placements, including a first and second coil facing each other with an insulating layer, and metal films spaced apart by a defined distance, along with recesses and guard rings to improve structural stability and dielectric breakdown voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If transformers are formed with large amounts of warping, then the device complexity is reduced, but the structural integrity deteriorates due to significant warpage

Engineering Contradiction:
Improvedevice complexityVSAvoidstructural integrity
Core Design Contradiction:
Device complexityVSStability of the object's composition

Solution Approach 1:

The device is divided into a coil region and a peripheral region, with the metal film selectively formed only in the peripheral region. This segmentation allows the coil region to maintain its transformer structure while the peripheral region provides warpage compensation, thus reducing overall device complexity while maintaining structural integrity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The metal film is formed locally in the peripheral region rather than uniformly across the entire device. This local quality approach allows the peripheral region to provide warpage compensation through the metal film's mechanical properties, while the coil region maintains its original transformer structure, resolving the contradiction between device complexity and structural integrity.

Inventive Principle:
Principle #3Local quality

2Manufacturing precision

If metal films are placed close to coils, then the manufacturing precision is improved, but the dielectric breakdown voltage deteriorates

Engineering Contradiction:
Improvemanufacturing precisionVSAvoiddielectric breakdown voltage
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The device structure is segmented into a coil region and a peripheral region, with the metal film formed only in the peripheral region. This spatial segmentation ensures that even when the metal film is placed close to coils for manufacturing precision, the dielectric breakdown voltage is protected by maintaining adequate spacing in the critical coil area while allowing close placement in the non-critical peripheral area.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20250293151A1Semiconductor device
Publication Date: 2025.09.18 RENESAS ELECTRONICS CORP
  • US20250293151A1 patent drawing
  • US20250293151A1 patent drawing
  • US20250293151A1 patent drawing

AI summary

A semiconductor device includes a semiconductor substrate and a multilayer wiring layer disposed on the semiconductor substrate. The semiconductor substrate includes, in plan view, a coil region and a peripheral region surrounding the coil region. The multilayer wiring layer includes a first coil, a second coil, a third coil, a fourth coil, and a metal film. The first coil and the second coil are formed in a first wiring layer being one of the plurality of wiring layers disposed on the coil region. The third coil and the fourth coil are formed in a second wiring layer being another one of the plurality of wiring layers disposed on the coil region. The second wiring layer is disposed above the first wiring layer. The third coil and the fourth coil are disposed so as to face the first coil and the second coil, respectively.