Transformer Pad Layout for Semiconductor Signal Transmission
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Solution Overview
Problem
Current semiconductor devices face challenges in efficiently transmitting signals between semiconductor chips due to high electrical resistance in conductive paths, leading to signal degradation and size limitations, which affect manufacturing yield and device performance.
Innovation Solution
The semiconductor device incorporates a specific arrangement of transformers and pads on semiconductor chips, where transformers are positioned closer to each chip, reducing the distance between pads and coils, and pads are arranged to minimize electrical resistance in conductive paths, thereby improving signal transmission and reducing device size without increasing aspect ratios.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the distance between pads and coils is reduced by repositioning transformers, then signal degradation is reduced and signal accuracy is improved, but device layout complexity increases
Solution Approach 1:
The patent applies local quality by positioning transformers with different configurations at different locations on the semiconductor chip. Specifically, first transformers are positioned closer to the first semiconductor chip to optimize signal transmission to that chip, while second transformers are positioned closer to the second semiconductor chip for optimal transmission to it. This location-specific optimization reduces signal degradation for each communication path while managing the overall layout complexity through systematic arrangement.
2Reliability
If transformers are positioned closer to semiconductor chips, then signal transmission performance is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent employs preliminary action by pre-defining specific positioning relationships between transformers and semiconductor chips during the design stage. The first transformers are predetermined to be positioned closer to the first semiconductor chip, and second transformers are predetermined to be positioned closer to the second semiconductor chip. This pre-planned arrangement simplifies the manufacturing process by providing clear positioning guidelines, thereby reducing the actual manufacturing precision requirements while ensuring optimal signal transmission performance.
3Reliability
If pads are arranged to minimize electrical resistance, then signal degradation is reduced, but device area increases
Solution Approach 1:
The patent applies partial action by optimizing pad arrangements only in the regions where they directly connect to transformers for signal transmission. The pads are arranged to minimize electrical resistance specifically in these critical signal paths, rather than optimizing the entire device area. This selective optimization reduces signal degradation in the most important communication paths while avoiding the need to expand the overall device area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This arrangement enhances signal accuracy and reduces signal degradation, allowing for smaller device sizes while maintaining manufacturing yield and improving flatness, thus addressing the limitations of existing technologies.
Implementation Method 1
each of the plurality of transformers has a primary coil and a secondary coil that are magnetically coupled to each other
Data Source
AI summary
A semiconductor device includes: a first chip mounting portion and a second chip mounting portion adjacent to each other in a first direction; a first semiconductor chip and a third semiconductor chip adjacent to each other in a second direction and mounted on the first chip mounting portion; and a second semiconductor chip mounted on the second chip mounting portion. The third semiconductor has: one or more first transformers used to transmit a signal from the first semiconductor chip to the second semiconductor chip; and one or more second transformers used to transmit a signal from the second semiconductor chip to the first semiconductor chip. In plan view, the first and second transformers are arranged along a side facing the second semiconductor chip, and the one of more first transformers are arranged closer to the first semiconductor chip than the one of more second transformers.