Transformer Acceleration Through Segmented Memory Banks

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Solution Overview

Problem

Transformer acceleration devices experience bottlenecks due to inefficient data storage and retrieval methods, leading to suboptimal performance in generating output tokens based on input tokens.

Innovation Solution

Implementing a transformer acceleration device with multiple memory bank arrays to store and retrieve weight matrices and key-value vector pairs, optimizing data access through separate memory banks for different processing circuits to reduce collisions and enhance efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single memory bank is used to store weight matrices and key-value vector pairs, then device complexity is reduced, but data access collisions occur leading to reduced productivity

Engineering Contradiction:
Improvememory bank structureVSAvoidtransformer operation speed
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The memory system is segmented into multiple independent memory banks (first memory bank array and second memory bank array). Each memory bank can independently store and retrieve data, allowing parallel access operations. This segmentation eliminates data access collisions that would occur in a single memory bank system, thereby improving transformer operation speed and productivity without significantly increasing overall system complexity.

Inventive Principle:
Principle #1Segmentation

2Ease of operation

If data is stored and retrieved using conventional methods, then ease of operation is maintained, but bottlenecks occur reducing operational speed

Engineering Contradiction:
Improvedata storage and retrievalVSAvoidtransformer operational speed
Core Design Contradiction:
Ease of operationVSSpeed

Solution Approach 1:

The patent extracts the data storage and retrieval functions into separate, dedicated memory bank arrays. The first memory bank array stores weight matrices while the second memory bank array stores key-value vector pairs. This extraction allows each memory bank to be optimized for its specific function, enabling faster data access and eliminating bottlenecks in the transformer operation pipeline.

Inventive Principle:
Principle #2Taking out (Extraction)

3Productivity

If multiple memory bank arrays are implemented, then data access efficiency is improved, but device complexity increases

Engineering Contradiction:
Improvedata access efficiencyVSAvoidmemory bank configuration
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent combines multiple memory bank arrays into a unified memory system architecture. The first and second memory bank arrays work together as an integrated system, with each array handling specific data types (weight matrices and key-value vector pairs respectively). This merging approach achieves high data access efficiency while managing complexity through systematic organization and clear functional separation.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20250278270A1Transformer acceleration device and operation method thereof
Publication Date: 2025.09.04 NAVER CORP
  • US20250278270A1 patent drawing
  • US20250278270A1 patent drawing
  • US20250278270A1 patent drawing

AI summary

A transformer acceleration device configured to execute a transformer comprising a first plurality of decoder layers and a second plurality of decoder layers is disclosed. The transformer acceleration device comprises a first memory bank array configured to store a first plurality of weight matrices corresponding to the first plurality of decoder layers and a first plurality of key-value vector pairs corresponding to the second plurality of decoder layers, and a second memory bank array configured to store a second plurality of weight matrices corresponding to the second plurality of decoder layers, and a second plurality of key-value vector pairs corresponding to the first plurality of decoder layers.