Transient Circuit Optimization via Discrete Time-Point Segmentation
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Solution Overview
Problem
Integrated circuit design faces challenges in optimizing complex analog circuits with numerous devices, requiring precise scaling and interaction analysis, especially with advancements in smaller lithographic dimensions and increased design tolerances, which complicates the process of reducing signal noise, leakage current, and power consumption.
Innovation Solution
A computer-implemented method for circuit evaluation that involves obtaining a representation of devices and connections, importing models, identifying multiple time points of operation, instantiating the circuit at those points, and optimizing it simultaneously to reduce delay, power consumption, or area, while capturing transient behavior and linking regions of operation using Kirchhoff current law equations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If detailed analysis of analog aspects is performed to ensure correct circuit operation, then manufacturing precision and reliability are improved, but device complexity and computational requirements increase
Solution Approach 1:
The patent segments the circuit analysis into discrete time points (N time points) and separates DC and transient analysis into distinct phases. The circuit is instantiated multiple times at different time points, allowing detailed analysis of analog aspects at each point while managing overall complexity through structured decomposition.
Solution Approach 2:
The patent changes the analysis approach by transitioning from continuous time-domain simulation to discrete time-point evaluation. By evaluating the circuit at specific time points (t1, t2, t3, etc.) rather than continuously, the system achieves detailed analog analysis with reduced computational complexity and improved manufacturing precision.
2Productivity
If multiple time points are analyzed to capture transient behavior, then circuit performance optimization is improved, but computational time and complexity increase
Solution Approach 1:
The patent performs preliminary DC analysis to establish operating points before transient analysis. By first determining DC currents and voltages at each time point, the system prepares the circuit state in advance, allowing more efficient transient analysis and reducing overall computational time while capturing comprehensive transient behavior.
Solution Approach 2:
The transient analysis is segmented into discrete time points rather than continuous simulation. By dividing the transient response into N distinct time points, the system achieves comprehensive performance optimization while reducing computational burden through parallelizable discrete evaluations.
3Loss of energy
If transistor dimensions are optimized to reduce delay and power consumption, then circuit efficiency is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent optimizes transistor dimensions (width, length, finger count) as key parameters to reduce power consumption and delay. By systematically varying these dimensional parameters across the circuit and analyzing performance at multiple time points, the system identifies optimal dimensions that balance power efficiency with manufacturability, reducing sensitivity to tight tolerances.
Solution Approach 2:
The patent creates multiple circuit instantiations at different time points, allowing the same circuit topology to be evaluated under different operating conditions. This copying approach enables optimization of transistor dimensions without requiring perfect manufacturing precision at all times, as each instantiation can be tuned independently for its specific temporal context.
Data Source
AI summary
Circuit simulation can be performed on digital, analog, and mixed signal types of circuitry. Phases of operation are identified for a circuit and transient behavior is analyzed. Multiple time points are identified and the circuit is replicated for those time points with evaluation of the circuitry performed at those various time points. Simultaneous optimization is performed across the time points. Transistors and other devices can have their lengths, widths, and number of fingers optimized. Simulation can include determining Kirchhoff current law equations for various nodes within the circuit. Equations describing device operation can include non-convex signomial equations and convex polynomial equations.