Transient Fault Analysis Circuit for Coordinated Attack Detection
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Solution Overview
Problem
Current data processing systems face difficulties in distinguishing between random transient faults and coordinated transient fault attacks, as existing techniques primarily focus on local fault detection and correction without providing a global view of fault behavior.
Innovation Solution
A data processing apparatus with fault history circuitry that detects local transient faults and maintains global transient fault history data, allowing analysis circuitry to differentiate between random transient faults and coordinated attacks by monitoring spatial and temporal fault behavior, and initiating countermeasures only for coordinated attacks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If local fault detection mechanisms are used, then transient faults can be detected, but the system cannot distinguish between random transient faults and coordinated attacks
Solution Approach 1:
The patent transitions from local fault detection to global fault pattern analysis by collecting fault data across multiple storage elements and time periods. This dimensional expansion enables the system to observe fault distributions and temporal patterns that distinguish random transient faults from coordinated attacks, resolving the inability to differentiate between these fault types while maintaining detection capability.
2Reliability
If countermeasures are initiated for all detected faults, then system security is improved, but false positives from random transient faults reduce system performance
Solution Approach 1:
The patent applies partial action by initiating countermeasures only when fault patterns indicate coordinated attacks rather than for every detected fault. The analysis circuitry evaluates fault distributions and temporal patterns to determine when countermeasures are warranted, thereby avoiding unnecessary performance degradation from false positives while maintaining security against actual threats.
3Measurement precision
If global fault history monitoring is implemented, then fault pattern analysis is enabled, but device complexity increases
Solution Approach 1:
The patent segments the fault monitoring function into distinct components: fault detection circuitry at storage elements, fault history circuitry for collecting and storing fault data, and analysis circuitry for pattern recognition. This segmentation allows each component to perform its specific function efficiently, enabling global fault pattern analysis while managing overall system complexity through modular architecture.
Data Source
AI summary
A data processing apparatus has a plurality of storage elements residing at different physical locations within the apparatus, and fault history circuitry for detecting local transient faults occurring in each storage element, and for maintaining global transient fault history data based on the detected local transient faults. Analysis circuitry monitors the global transient fault history data to determine, based on predetermined criteria, whether the global transient fault history data is indicative of random transient faults occurring within the data processing apparatus, or is indicative of a coordinated transient fault attack. The analysis circuitry is then configured to initiate a countermeasure action on determination of a coordinated transient fault attack. This provides a simple and effective mechanism for distinguishing between random transient faults that may naturally occur, and a coordinated transient fault attack that may be initiated in an attempt to circumvent the security of the data processing apparatus.