Transient Voltage Suppression Device Latch-Up Prevention

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Solution Overview

Problem

Conventional transient voltage suppression devices face challenges with latch-up events due to the need for a guard ring, which occupies a large area and can lead to latch-up issues, especially when the N-type heavily-doped area is floating, and cannot always connect to the high voltage terminal.

Innovation Solution

The improved transient voltage suppression device uses a second diode to separate the first diode from the transient voltage suppressor without a guard ring, reducing the layout area and increasing the latch-up path, thereby avoiding latch-up events by grounding the N-type heavily-doped clamping area and using power buses to connect the second diode to the transient voltage suppressor.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a guard ring is arranged between the first diode and the power clamping element to prevent latch-up, then the latch-up resistance is improved, but the layout area increases significantly

Engineering Contradiction:
Improvelatch-up resistanceVSAvoidlayout area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent removes the guard ring structure from the device. Instead of adding a guard ring between the first diode and power clamping element, the invention uses the semiconductor substrate itself as the isolation medium, thereby eliminating the area-consuming guard ring while maintaining latch-up prevention functionality.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The semiconductor substrate serves dual functions: it acts as both the structural foundation for mounting components and as the isolation medium to prevent latch-up. This multi-functionality eliminates the need for dedicated guard ring structures, reducing layout area while maintaining reliability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If the N-type heavily-doped area is connected to the high voltage terminal to improve guard ring effectiveness, then the latch-up prevention is enhanced, but the device cannot be used in applications where this connection is not feasible

Engineering Contradiction:
Improvelatch-up preventionVSAvoidapplication compatibility
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The semiconductor substrate automatically provides isolation and latch-up prevention functionality without requiring external connections or additional structures. The substrate's inherent properties are utilized to prevent latch-up, making the device adaptable to various applications regardless of high voltage terminal availability.

Inventive Principle:
Principle #25Self-service

3Ease of operation

If the first diode is placed closer to the power clamping element to shorten the conductive trace, then the ESD discharging path impedance is reduced, but the guard ring occupies more area

Engineering Contradiction:
ImproveESD discharging path impedanceVSAvoidguard ring area
Core Design Contradiction:
Ease of operationVSArea of stationary object

Solution Approach 1:

The guard ring is completely removed from the structure. The patent places the first diode close to the power clamping element without requiring a guard ring, achieving low ESD discharging path impedance while eliminating the area-consuming guard ring that traditionally was needed for protection.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively reduces the clamping voltage and discharging path, prevents latch-up events, and allows for a smaller layout area by eliminating the need for a guard ring and enabling the semiconductor substrate to function like a guard ring, thus enhancing the device's performance and reliability.

Implementation Method 1

The discharging current flows through the first diode 10 and the power clamping element 14 when a positive pulse appears at an I/O port. The discharging current flows through the second diode 12 when a negative pulse appears at an I/O port.

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS10388647B1Transient voltage suppression device
Publication Date: 2019.08.20 AMAZING MICROELECTRONICS
  • US10388647B1 patent drawing
  • US10388647B1 patent drawing
  • US10388647B1 patent drawing

AI summary

An improved transient voltage suppression device includes a semiconductor substrate, a transient voltage suppressor, at least one first diode, at least one conductive pad, and at least one second diode. The transient voltage suppressor has an N-type heavily-doped clamping area. The first anode of the first diode is electrically connected to the N-type heavily-doped clamping area. The conductive pad is electrically connected to the first cathode of the first diode. The second anode of the second diode is electrically connected to the conductive pad and the second cathode of the second diode is electrically connected to the transient voltage suppressor. The first anode is closer to the N-type heavily-doped clamping area rather than the conductive pad. The conductive pad is closer to the N-type heavily-doped clamping area rather than the second anode.