Transient Voltage Suppression Device with Segmented Doped Regions
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Solution Overview
Problem
Conventional transient voltage suppressors (TVS) face reduced protection against high-power electrostatic discharge due to size reduction in electronic devices, necessitating improved electrostatic discharge tolerance and reduced junction capacitance within a limited layout area.
Innovation Solution
A transient voltage suppression device with a substrate, wells, anodes, cathodes, and trigger nodes featuring doped regions of specific conductivity types, allowing for reduced area occupation, enhanced electrostatic discharge tolerance, and adjustable breakdown voltage through doping concentration changes, while minimizing junction capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the device size is reduced to meet high-speed, high-efficiency, light, thin, and short trends, then the device area is reduced, but the protection ability against electrostatic discharge and surge is weakened
Solution Approach 1:
The TVS device is segmented into multiple doped regions (first doped region, second doped region, third doped region, fourth doped region, fifth doped region) with different conductivity types arranged in a specific configuration. This segmentation allows each region to contribute to different aspects of ESD protection while maintaining a compact overall structure, resolving the contradiction between small area and high protection ability.
Solution Approach 2:
The patent employs a nested structure where the first well is disposed in the substrate, the first cathode is disposed in the first well, and the first trigger node is disposed between the first anode and the first cathode with doped regions at multiple levels. This nesting approach maximizes the use of vertical space, achieving high ESD tolerance within a minimal footprint.
2Area of moving object
If the device area is reduced, then the layout area is minimized, but the junction capacitance increases
Solution Approach 1:
Different doped regions are assigned different doping concentrations to optimize local properties. The fourth doped region has a doping concentration greater than or equal to the fifth doped region, creating localized variations in electrical characteristics that reduce junction capacitance while maintaining compact dimensions.
3Area of moving object
If the device area is reduced, then the layout area is minimized, but the electrostatic discharge tolerance decreases
Solution Approach 1:
The patent transitions from a two-dimensional planar arrangement to a three-dimensional vertical structure by disposing the first well in the substrate, the first cathode in the first well, and the trigger node between the anode and cathode. This vertical stacking in another dimension achieves high ESD tolerance within a minimal layout area.
Solution Approach 2:
The device uses a composite structure combining multiple semiconductor materials with different conductivity types (first conductivity type and second conductivity type) arranged in a P+/N-sub junction and N+/P+/N+ junction configurations. This composite approach enables high ESD tolerance in a compact form factor.
4Adaptability or versatility
If the doping concentration is increased to improve breakdown voltage control, then the breakdown voltage or trigger voltage can be adjusted, but the device complexity increases
Solution Approach 1:
The patent controls breakdown voltage and trigger voltage by adjusting the doping concentration of specific doped regions (fourth doped region and fifth doped region). By changing this single parameter, the device achieves adjustable breakdown characteristics without increasing structural complexity, as the doping concentration can be modified during the manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The device effectively increases electrostatic discharge tolerance, reduces on-resistance, and simplifies design complexity by utilizing N+/P+/N+ junction structures and P+/N-sub junctions, enhancing device density and capacitance performance.
Implementation Method 1
due to the low concentration of N-sub, the depletion region between N-sub and P+ is enlarged
Implementation Method 2
the doped regions at the cathode are N+/P+/N+ junction structures of the same diffusion region and have the same potential to increase the trigger current
Data Source
AI summary
A transient voltage suppression device including a substrate of a first conductivity type, a first well of a second conductivity type, a first anode, a first cathode, and a first trigger node is provided. The first well is disposed in the substrate. The first anode is disposed in the substrate outside the first well and includes a second doped region of the second conductivity type and a third doped region of the first conductivity type disposed between the second doped region and the first doped region. The first trigger node is disposed between the first anode and the first cathode, and includes a fourth region of the first conductivity type disposed in the substrate and a fifth doped region of the second conductivity type at least partially disposed in the first well and disposed between the fourth doped region and the third doped region.