Transient Voltage Suppression Device With Shared Bypass Diodes
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Solution Overview
Problem
Conventional transient voltage suppressors require significant circuit area and increase costs due to the need for additional diodes as the number of channels increases, which complicates ESD protection for CMOS IC products by not effectively reducing parasitic capacitance and holding voltage.
Innovation Solution
A transient voltage suppression device is designed with a diode string, power clamp device, first bypass diodes, and second bypass diodes, which are strategically coupled to reduce parasitic capacitance and adjust holding voltage, allowing for flexible ESD path management without increasing circuit area, using a semiconductor substrate and bi-directional ESD devices like MOSFETs or BJTs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If additional diodes are arranged on each channel to reduce parasitic capacitance, then the equivalent capacitances on current dissipation paths are reduced, but the circuit area required by the transient voltage suppressor increases significantly
Solution Approach 1:
The patent merges multiple diode functions into a single shared bypass diode structure. Instead of having separate diodes for each channel, the invention uses one common bypass diode that can handle ESD events for multiple channels simultaneously, thereby reducing the total circuit area while maintaining ESD protection effectiveness.
Solution Approach 2:
The bypass diode is designed to serve multiple functions and multiple channels at once. A single bypass diode structure provides ESD protection for numerous I/O channels, making the protection mechanism universal rather than channel-specific, which directly reduces the area required per channel.
2Reliability
If additional diodes are arranged on each channel, then the equivalent capacitances on current dissipation paths are reduced, but the circuit costs increase dramatically
Solution Approach 1:
The patent merges multiple diode functions into a single shared bypass diode structure. Instead of having separate diodes for each channel, the invention uses one common bypass diode that can handle ESD events for multiple channels simultaneously, thereby reducing the total circuit area while maintaining ESD protection effectiveness.
Solution Approach 2:
The bypass diode is designed to serve multiple functions and multiple channels at once. A single bypass diode structure provides ESD protection for numerous I/O channels, making the protection mechanism universal rather than channel-specific, which directly reduces the area required per channel.
3Reliability
If conventional TVS structure is used with diodes between I/O terminals and power/ground terminals, then parasitic capacitance is reduced, but the device complexity increases with the number of channels
Solution Approach 1:
The patent merges multiple diode functions into a single shared bypass diode structure. Instead of having separate diodes for each channel, the invention uses one common bypass diode that can handle ESD events for multiple channels simultaneously, thereby reducing the total circuit area while maintaining ESD protection effectiveness.
Solution Approach 2:
The bypass diode is designed to serve multiple functions and multiple channels at once. A single bypass diode structure provides ESD protection for numerous I/O channels, making the protection mechanism universal rather than channel-specific, which directly reduces the area required per channel.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces equivalent capacitances on current dissipation paths and adjusts holding voltage, enhancing ESD protection while minimizing the required circuit area and costs, regardless of the number of channels, thus improving the reliability of CMOS IC products.
Implementation Method 1
The transient voltage suppression device includes at least one diode string, a power clamp device, at least one first bypass diode, and at least two second bypass diodes
Implementation Method 2
flexibly adjusts and reduces the parasitic capacitance of an electrostatic discharge (ESD) path
Implementation Method 3
The power clamp device is coupled between the power terminal and the common bus
Implementation Method 4
The bi-directional electrostatic discharge device is coupled between the common bus and a ground terminal
Data Source
AI summary
A transient voltage suppression device includes at least one diode string, a power clamp device, at least one first bypass diode, and at least two second bypass diodes. The diode string is coupled between a power terminal and a common bus and coupled to an input output (I/O) port. The power clamp device is coupled between the power terminal and the common bus. The first bypass diode is coupled between the common bus and a ground terminal. The second bypass diodes are coupled in series, coupled between the common bus and the ground terminal, and coupled to the first bypass diode in reverse parallel. Alternatively, the first bypass diode and the second bypass diodes are replaced with at least one bi-directional electrostatic discharge (ESD) device.