Transistor Aging for Leakage Current Reduction in Display Devices
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Solution Overview
Problem
Display devices experience leakage currents when transistors are in the off state, leading to image deterioration and flicker due to prolonged pixel information retention at low driving frequencies.
Innovation Solution
A method of aging transistors in display devices by applying specific voltage configurations to gate electrodes and semiconductor layers, creating charge trap regions in the gate insulating layer to reduce gate-induced drain leakage and alleviate leakage currents, involving structures with overlapping gate electrodes and semiconductor regions with varying electron and hole densities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the display device is driven at a low frequency, then power consumption is reduced, but leakage current occurs in pixels causing image deterioration and flicker
Solution Approach 1:
The patent applies preliminary aging treatment to transistors during the manufacturing process, creating charge trap regions in advance within the gate insulating layer. This preliminary action prepares the transistor to resist leakage current before the display device is put into operation, ensuring stable image quality even when driven at low frequencies with reduced power consumption.
Solution Approach 2:
The patent converts the harmful gate-induced drain leakage (GIDL) effect into a beneficial structure by intentionally creating charge trap regions in the gate insulating layer. These trap regions, which would normally be sources of leakage, are engineered to capture and hold charges that would otherwise cause GIDL, thereby transforming the harmful effect into a mechanism that suppresses leakage current.
2Ease of manufacture
If conventional transistor structures are used, then manufacturing is simpler, but gate-induced drain leakage occurs causing off-state leakage current
Solution Approach 1:
The patent introduces a dual-gate transistor structure where the second gate electrode and its associated gate insulating layer are selectively positioned only in regions where charge trap formation is needed. This local modification allows the transistor to maintain simple manufacturing processes for the most part, while applying the complex charge trap structure only where it is needed to suppress GIDL and reduce off-state leakage current.
3Reliability
If aging treatment is applied to transistors, then leakage current is reduced, but manufacturing process complexity increases
Solution Approach 1:
The aging treatment is performed as a preliminary step during the manufacturing process, forming charge trap regions in the gate insulating layer before the transistor is assembled into the display device. By completing the aging treatment upfront, the patent ensures improved transistor reliability while avoiding the need for complex real-time aging control systems during device operation.
Solution Approach 2:
The patent employs self-aligned processes where the second gate electrode is positioned to overlap with the semiconductor layer in a manner that automatically defines the charge trap region formation area. This self-alignment reduces the need for additional lithography and patterning steps, thereby limiting the increase in manufacturing process complexity while still achieving the desired aging effect.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively reduces leakage currents and prevents momentary afterimages by compensating electric fields and trapping charges, thereby maintaining image frame information and improving display stability.
Implementation Method 1
the gate insulating layer has a first region adjacent to the drain region and a second region adjacent to the source region, wherein an electron or hole density in the first region is higher than an electron or hole density in the second region
Data Source
AI summary
A display device including pixels is provided. Each of the pixels includes a first transistor having a gate electrode connected to a first node, a first electrode connected to a second node, and a second electrode connected to a third node, a second transistor having a gate electrode connected to a first scan line, a first electrode connected to a data line, and a second electrode connected to the second node, and a third transistor having a first gate electrode connected to the first scan line, a second gate electrode, a first electrode connected to the first node, and a second electrode connected to the third node. The second gate electrode may be in a floating state, and the third transistor may be aged to alleviate a leakage current in order to improve image generation.