Air-Gapped Isolation Walls in Transistor Layers for Capacitance Reduction

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Solution Overview

Problem

Conventional transistors face issues with parasitic capacitance due to tightly-spaced conductive components, which degrade device performance and are exacerbated by power delivery through the transistor layer and back side contacts, leading to unwanted capacitance with conductive gates and components.

Innovation Solution

Incorporation of air gaps within the transistor layer to reduce capacitance by replacing portions of the gate cut dielectric with air, particularly between adjacent gates and vias, and between source or drain regions, capped with a dielectric material to allow for additional interconnect layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional dielectric materials are used to isolate conductive components, then electrical isolation is provided, but parasitic capacitance increases degrading device performance

Engineering Contradiction:
Improvedevice performanceVSAvoidparasitic capacitance
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent changes the dielectric parameter (permittivity) by replacing conventional dielectric materials with air gaps. Air has a permittivity of approximately 1, which is significantly lower than conventional dielectric materials, thereby reducing parasitic capacitance between conductive components while maintaining electrical isolation.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces air gaps (porous structure) between conductive components such as gates, source regions, and drain regions. These air gaps serve as low-permittivity regions that reduce parasitic capacitance while maintaining the structural integrity and electrical isolation requirements of the device.

Inventive Principle:
Principle #31Porous materials

2Object-generated harmful factors

If air gaps are introduced to reduce capacitance, then parasitic capacitance decreases, but device structure becomes more complex

Engineering Contradiction:
Improveparasitic capacitanceVSAvoiddevice structure
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The patent extracts the dielectric material from specific regions between conductive components and replaces it with air gaps. This removal of material simplifies the overall structure by eliminating the need for complex low-permittivity dielectric materials while achieving the desired capacitance reduction through the inherent properties of air.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The implementation of air gaps significantly reduces parasitic capacitance, enhancing electrostatic control and performance of non-planar transistors, such as FinFETs and GAA transistors, leading to improved current flow, reduced leakage, and increased energy efficiency in integrated circuits.

Implementation Method 1

Incorporation of air gaps within the transistor layer to reduce capacitance by replacing portions of the gate cut dielectric with air, particularly between adjacent gates and vias, and between source or drain regions

Methodology Applied
Scientific EffectCapacitance reduction through air gap formation: Capacitance

Data Source

PatentUS20250210522A1Air-gapped isolation walls
Publication Date: 2025.06.26 INTEL CORP
  • US20250210522A1 patent drawing
  • US20250210522A1 patent drawing
  • US20250210522A1 patent drawing

AI summary

Air gaps are incorporated into a transistor layer to reduce capacitance between conductive components. In some embodiments, along a gate cut region extending across the gates of multiple transistors, a gate cut dielectric may be partially or fully replaced by an air gap. The air gap may extend between two adjacent gates of two adjacent transistors, or between a gate and a via, where the via extends through the gate line and between two gates. As another example, air gaps may extend between adjacent source or drain regions between pairs of adjacent transistors, e.g., in a device that includes back side source or drain contacts. The air gap may be formed on the back side of the device. The air gaps are capped by a dielectric material, so that additional layers (e.g., back side interconnect layers) may be formed over the air gap.