Transistor Array Reconfiguration for Linear RF Power Amplifiers

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Solution Overview

Problem

Radio-frequency power amplifiers face inefficiencies and performance issues due to non-linear designs, current collapse, and memory effects, which affect transmit system linearity and require advanced correction methods.

Innovation Solution

A power amplification system with a monitor and adapt system that measures forward and reverse power, uses artificial intelligence or neural networks to generate control signals for digital predistortion, and adjusts transistor properties and array size to optimize performance, including correcting memory and current collapse effects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If a power amplifier operates at high power levels to provide desired amplification, then the amplification capability is improved, but power consumption and inefficiency increase

Engineering Contradiction:

Improveamplification capabilityVSAvoidpower consumption

Core Design Contradiction:

PowerVSLoss of energy

Solution Approach 1:

The patent implements dynamic operation mode switching between Class AB and Class E based on signal conditions. The power amplifier transitions from a static design to a dynamic one where the operating class changes adaptively, allowing high power output when needed while consuming less power during normal operation, thus resolving the contradiction between amplification capability and power consumption

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent changes the operating parameters of the power amplifier by switching between different classes of operation (Class AB to Class E). This parameter change allows the amplifier to achieve high efficiency at lower power levels while maintaining the capability for high power output when required, addressing the energy loss issue

Inventive Principle:

Principle #35Parameter changes

2Loss of energy

If a non-linear power amplifier design is used to improve efficiency, then power consumption is reduced, but transmit system linearity deteriorates

Engineering Contradiction:

Improvepower consumptionVSAvoidtransmit system linearity

Core Design Contradiction:

Loss of energyVSReliability

Solution Approach 1:

The patent applies digital predistortion (DPD) to pre-compensate for the non-linearities introduced by the efficient Class E operation. By applying the opposite distortion in advance, the system counteracts the linearity degradation while maintaining the power efficiency benefits of non-linear operation

Inventive Principle:

Principle #9Preliminary anti-action

Solution Approach 2:

The patent implements a feedback mechanism using a monitor and adapt system that measures forward and reverse power and adjusts operating parameters in real-time. This feedback loop corrects linearity issues dynamically while maintaining the efficiency advantages of non-linear operation

Inventive Principle:

Principle #23Feedback

3Device complexity

If a fixed transistor array configuration is used to simplify the design, then device complexity is reduced, but adaptability to different operating conditions deteriorates

Engineering Contradiction:

Improvetransistor array configurationVSAvoidoperating condition adaptability

Core Design Contradiction:

Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent implements dynamic reconfiguration of the transistor array where the number of active transistors and their connectivity are changed based on operating conditions. The array can switch between different configurations (including Class AB and Class E modes) to adapt to varying power and efficiency requirements without requiring multiple fixed designs

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent divides the transistor array into separable units that can be independently controlled and reconfigured. This segmentation allows flexible combination of transistors to create different effective configurations, providing adaptability while maintaining a single physical array structure

Inventive Principle:

Principle #1Segmentation

4Reliability

If advanced correction methods are applied to correct memory effects and current collapse, then transmit system linearity is improved, but device complexity increases

Engineering Contradiction:

Improvetransmit system linearityVSAvoidcorrection system

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces a digital signal processing intermediary that handles memory effect correction and current collapse compensation. This separate processing layer corrects linearity issues without directly complicating the power amplifier hardware, as the corrections are applied through signal processing algorithms rather than additional physical components

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS20230092678A1Dynamic optimization of transistor array in power amplifier

Publication Date: 2023.03.23 SKYWORKS SOLUTIONS INC

AI summary

Dynamic optimization of transistor array in power amplifier. In some embodiments, a power amplification system can include a power amplifier including an array of transistors, with the array configured to receive an input signal and provide an amplified signal. The power amplification system can further include a monitoring system including a plurality of sensing circuits implemented at respective locations of the array, and a control system configured to obtain sensed information from the plurality of sensing circuits, and based on the information, generate a pattern of one or more transistor properties over the array to allow operation of the array in a desired manner based on the pattern.