Semiconductor Transistor Attribute Layout for Mixed-Device Performance
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Solution Overview
Problem
Forming different types of electronic devices on the same semiconductor substrate with optimal transistor attributes is challenging, as it often results in sub-optimal performance due to conflicting requirements for parameters like fin height, source-drain profile, and contact width, leading to decreased performance or inefficiencies in power consumption and capacitance.
Innovation Solution
Implementing semiconductor manufacturing processes that co-optimize fin height, shallow source-drain profile, and source or drain contact width for different types of electronic devices, such as finFETs, using techniques like etching, lithography, and masking to tailor transistor attributes for specific devices, allowing for increased performance across multiple types of devices on a single substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If different types of electronic devices are formed on the same semiconductor substrate with uniform transistor attributes, then manufacturing simplicity is maintained, but device performance is sub-optimal due to conflicting requirements
Solution Approach 1:
The patent applies local quality by forming different transistor attribute sets in different regions of the semiconductor substrate. First transistor attribute sets (e.g., first fin height, first source-drain profile) are formed in first regions, while second transistor attribute sets (e.g., second fin height, second source-drain profile) are formed in second regions. This allows each device type to have locally optimized transistor attributes tailored to its specific performance requirements, resolving the contradiction between manufacturing simplicity and device performance.
2Reliability
If transistor attributes are optimized for one type of device, then that device's performance is improved, but other device types experience decreased performance due to non-optimal attributes
Solution Approach 1:
The patent segments the semiconductor substrate into multiple regions, where each region is configured with transistor attributes optimized for specific device types. By dividing the substrate and applying different attribute sets to different segments, the patent enables each device type to achieve optimal performance while maintaining the ability to fabricate multiple device types on the same substrate.
Solution Approach 2:
Different transistor attribute sets are applied locally to different regions of the substrate. First transistor attribute sets are formed in first regions for first types of devices, while second transistor attribute sets are formed in second regions for second types of devices. This local differentiation allows each device type to have attributes specifically optimized for its performance requirements.
3Power
If fin height is increased to improve drive current, then drive current increases, but power consumption increases due to higher capacitance
Solution Approach 1:
The patent applies different fin height attributes locally to different device regions. Devices requiring high drive current can have increased fin height, while devices requiring low power consumption can have reduced fin height. This local optimization allows each device to have fin height specifically tailored to its performance requirements, resolving the trade-off between drive current and power consumption.
Data Source
AI summary
Transistors of different types of electronic devices on the same semiconductor substrate are configured with different transistor attributes to increase the performance of the different types of electronic devices. Fin height, shallow source drain (SSD) height, source or drain width, and/or one or more other transistor attributes may be co-optimized for the different types of electronic devices by various semiconductor manufacturing processes such as etching, lithography, process loading, and/or masking, among other examples. This enables the performance of a plurality of types of electronic devices on the same semiconductor substrate to be increased.