Transistor Biasing via Third Derivative Measurement

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Solution Overview

Problem

Transistors in amplifiers and mixers exhibit non-linearities, leading to harmonic generation and inter-modulation, which complicates high-performance amplifier design and degrades signal reception, especially in integrated circuits where process variations cause inconsistent transistor characteristics.

Innovation Solution

A controllable bias generator system with a test circuit and digital Mth order differentiator that calculates derivatives to optimize transistor biasing, reducing power consumption and simplifying the measurement process by only powering the analog portion when necessary, allowing for precise bias point setting to minimize non-linearities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional biasing methods are used, then the amplifier can operate, but third-order non-linearity and harmonic generation occur which degrade signal quality

Engineering Contradiction:
Improvesignal fidelityVSAvoidthird-order non-linearity
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent applies preliminary action by measuring and determining the optimal bias point before normal amplifier operation. The bias point measurement circuit calculates the third derivative of the transistor transfer characteristic to identify the precise bias voltage that minimizes third-order non-linearity. This preliminary measurement and optimization step is performed once to establish the correct operating point, after which the amplifier operates with minimized distortion without requiring continuous intervention.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If continuous bias measurement and adjustment is performed, then non-linearity can be minimized, but power consumption increases

Engineering Contradiction:
Improvebias accuracyVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements periodic action by performing bias measurement and adjustment only at specific intervals rather than continuously. The system measures the third derivative and determines the optimal bias point, then allows the amplifier to operate with this predetermined bias setting. The measurement and adjustment process is repeated only when necessary, such as when drift is detected or after power-up, rather than continuously during normal operation. This periodic approach maintains bias accuracy while significantly reducing power consumption compared to continuous monitoring and adjustment.

Inventive Principle:
Principle #19Periodic action

3Reliability

If complex bias control circuits are used, then non-linearity can be reduced, but device complexity increases

Engineering Contradiction:
ImprovelinearityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies the taking out principle by extracting only the essential measurement and control functions needed to minimize third-order non-linearity. Rather than implementing a complex continuous control system, the invention extracts the key third derivative measurement capability and uses it to determine the optimal bias point. The measurement circuit is designed to perform only the necessary calculation (third derivative) without unnecessary additional functionality, and the control mechanism is simplified to adjust the bias voltage based on this measurement. This extraction approach reduces circuit complexity while maintaining effectiveness in reducing non-linearity.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS7323929B2Apparatus for and method of biasing a transistor
Publication Date: 2008.01.29 MEDIATEK INC
  • US7323929B2 patent drawing
  • US7323929B2 patent drawing
  • US7323929B2 patent drawing

AI summary

An apparatus for biasing a transistor, comprising: a controllable bias generator; a test circuit; a digital Mth order differentiator responsive to an output of the test circuit; and a controller responsive to the digital Mth order differentiator for controlling the controllable bias generator; wherein the test circuit is configured to calculate an Lth order derivative of the transistor's performance.