Integrated Transistor Capacitor Structure for Low Parasitic Capacitance
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Solution Overview
Problem
Existing transistors face challenges in miniaturization, high parasitic capacitance, low frequency characteristics, unstable electrical properties, and high off-state current, which hinder their integration and performance in semiconductor devices.
Innovation Solution
A capacitor structure is integrated into a transistor design, utilizing a conductor with tungsten and silicon, and an insulator of silicon oxide film, with plasma treatment to form a thin insulator layer, enhancing electrical connectivity and reducing parasitic capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If transistor size is reduced for miniaturization, then integration density increases, but parasitic capacitance increases and frequency characteristics deteriorate
Solution Approach 1:
The capacitor and transistor are integrated into a single device structure, where the capacitor is formed using the drain electrode and a separate electrode with an insulator therebetween. This merging reduces the number of discrete components and interconnections, thereby reducing parasitic capacitance and improving frequency characteristics while maintaining miniaturization.
Solution Approach 2:
The insulator in the capacitor is made extremely thin (less than or equal to 15 nm) to reduce capacitance, while the oxide semiconductor layer maintains specific thickness ranges (5-50 nm) to ensure proper electrical characteristics. This local optimization of layer thicknesses allows the device to achieve both miniaturization and good frequency characteristics.
2Volume of moving object
If transistor size is reduced for miniaturization, then integration density increases, but off-state current increases
Solution Approach 1:
The oxide semiconductor layer thickness is controlled within a specific range (5-50 nm) to optimize electrical characteristics, and the insulator thickness is reduced to less than or equal to 15 nm. These parameter changes enable the miniaturized transistor to maintain low off-state current while achieving high integration density.
Solution Approach 2:
The device uses a composite structure combining oxide semiconductor material with conventional semiconductor materials, allowing the oxide semiconductor to provide low off-state current characteristics even in miniaturized structures where conventional materials would exhibit higher leakage currents.
3Reliability
If insulator thickness is reduced to less than or equal to 15 nm, then parasitic capacitance decreases, but manufacturing precision requirements increase
Solution Approach 1:
The insulator is formed by oxidizing the first conductor (tungsten and silicon alloy) in situ, which provides self-aligned thickness control. This self-service approach reduces the need for separate deposition and thickness control processes, thereby reducing manufacturing complexity and improving precision even for extremely thin insulators.
Solution Approach 2:
The first conductor is designed as a tungsten-silicon alloy with specific composition ratios, which enables controlled oxidation to form insulators with precise thicknesses. By adjusting the silicon content and oxidation conditions, the insulator thickness can be precisely controlled at extremely thin dimensions without requiring ultra-precise external control mechanisms.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables a miniaturized transistor with low parasitic capacitance, high frequency characteristics, stable electrical properties, and reduced off-state current, facilitating high-speed operation and integration in semiconductor devices.
Implementation Method 1
the insulator includes a silicon oxide film formed by oxidizing the first conductor
Implementation Method 2
a method for manufacturing a capacitor including a step of forming a first conductor, a step of performing plasma treatment containing oxygen on the first conductor, so that a silicon oxide film is formed on a surface of the first conductor
Data Source
AI summary
A miniaturized transistor is provided. A transistor with low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. A transistor having a large amount of on-state current is provided. A semiconductor device including the transistor is provided. A semiconductor device with high integration is provided. A novel capacitor is provided. The capacitor includes a first conductor, a second conductor, and an insulator. The first conductor includes a region overlapping with the second conductor with the insulator provided therebetween. The first conductor includes tungsten and silicon. The insulator includes a silicon oxide film that is formed by oxidizing the first conductor.


