Transistor Cascode Assembly Reducing Inductance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current power electronic transistors face limitations in high-voltage switching applications, particularly in terms of on-resistance and switching speed, and existing assembly methods for combining high-voltage and low-voltage transistors can lead to increased inductance and thermal dissipation issues.
Innovation Solution
The integration of a high-voltage depletion-mode transistor and a low-voltage enhancement-mode transistor with an electrically conductive member, forming a cascode or half-bridge circuit, where the conductive member is used to connect the transistors and reduce inductance, and the assembly is formed using solder paste and heat treatment for efficient electrical connection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional assembly methods are used to combine high-voltage and low-voltage transistors, then the transistors can be connected electrically, but the inductance increases and thermal dissipation performance deteriorates
Solution Approach 1:
The patent combines the electrical connection function and thermal management function into a single integrated substrate structure. The substrate serves simultaneously as the electrical interconnection medium and the heat dissipation pathway, eliminating the need for separate connection elements that would add inductance and thermal resistance.
Solution Approach 2:
The substrate is designed to perform multiple functions: providing electrical connections between transistors, serving as a heat sink for thermal dissipation, and maintaining mechanical stability. This multi-functional design reduces the number of separate components needed, thereby reducing overall inductance and improving thermal performance.
2Stress or pressure
If high-voltage depletion-mode transistors are used, then high-voltage switching capability is achieved, but the on-resistance increases
Solution Approach 1:
The patent employs different transistor types in different regions of the circuit: depletion-mode transistors are used specifically where high-voltage blocking capability is required, while enhancement-mode transistors are used where low on-resistance is the priority. This spatial differentiation of transistor characteristics optimizes both voltage handling and conduction loss.
Solution Approach 2:
The circuit design uses a composite approach by integrating both depletion-mode and enhancement-mode transistors in a single system. Each transistor type contributes its superior properties: depletion-mode for high-voltage capability and enhancement-mode for low on-resistance, creating a composite circuit that achieves both objectives.
3Speed
If fast switching times are achieved, then power electronic performance is improved, but thermal dissipation issues worsen
Solution Approach 1:
The substrate is pre-designed with optimized thermal pathways and heat sink structures before the transistors are mounted. This preliminary thermal management design ensures that heat generated during fast switching operations can be efficiently conducted away from the transistor junctions, preventing thermal accumulation even at high switching speeds.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the performance of power electronic components by reducing inductance and improving thermal dissipation, enabling efficient high-voltage switching with low on-resistance and fast switching times.
Implementation Method 1
applying solder paste to at least one electrically conductive portion of a package, applying a high-voltage depletion-mode transistor onto the solder paste, applying a low-voltage enhancement-mode transistor onto the solder paste, applying solder paste onto the high-voltage depletion-mode transistor, applying solder paste onto the low-voltage enhancement-mode transistor, applying an electrically conductive member onto the solder paste on the high-voltage depletion-mode transistor and onto the low-voltage enhancement-mode transistor and forming an assembly, heat treating the assembly and producing an electrical connection between the high-voltage depletion-mode transistor and the low-voltage enhancement-mode transistor with the electrically conductive member
Data Source
AI summary
A method of manufacturing an electronic component includes applying solder paste to at least one electrically conductive portion of a package, applying a high-voltage depletion-mode transistor onto the solder paste, applying a low-voltage enhancement-mode transistor onto the solder paste, applying solder paste onto the high-voltage depletion-mode transistor, applying solder paste onto the low-voltage enhancement-mode transistor, applying an electrically conductive member onto the solder paste on the high-voltage depletion-mode transistor and onto the solder paste on the low-voltage enhancement-mode transistor to form an assembly, and heat treating the assembly to produce an electrical connection between the high-voltage depletion-mode transistor and the low-voltage enhancement-mode transistor via the electrically conductive member.