Semiconductor Transistor Cell Array With Different Threshold Voltages
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Semiconductor devices like IGBTs and IGFETs face a trade-off between voltage gradient and switching losses, making independent optimization of these characteristics challenging when switching loads such as motors.
Innovation Solution
A semiconductor device with a transistor cell array comprising two groups of transistor cell units with different threshold voltages and channel widths, allowing for optimized current-carrying areas and matching current voltage characteristics to avoid current density maldistributions during switching operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single threshold voltage is used for all transistor cell units, then the device structure is simple, but current density maldistributions occur during switching operations
Solution Approach 1:
The patent divides the transistor cell array into multiple groups, where each group has transistor cell units with identical threshold voltages tailored to specific local requirements. This local differentiation allows optimization of current density distribution in different regions without requiring complete redesign of the entire device structure.
Solution Approach 2:
The transistor cell array is segmented into multiple groups with different threshold voltages. Each group can be independently optimized for specific functions, enabling better control over current density distribution while maintaining overall device functionality.
2Speed
If voltage gradient is increased, then switching speed improves, but switching losses increase
Solution Approach 1:
The patent employs multiple threshold voltage groups to create different voltage gradients across various regions of the device. By adjusting threshold voltages rather than uniformly increasing voltage gradients, the device achieves improved switching speed in critical regions while controlling switching losses through localized parameter optimization.
Solution Approach 2:
Different regions of the transistor cell array are assigned different threshold voltages to create locally optimized voltage gradients. This allows high voltage gradients (and thus high switching speed) in regions where it is most beneficial, while maintaining lower voltage gradients in regions where excessive switching losses would occur.
Data Source
AI summary
An embodiment of a semiconductor device comprises a transistor cell array in a semiconductor body. The transistor cell array comprises transistor cell units. Each of the transistor cell units comprises a control terminal and first and second load terminals, respectively. The transistor cell units are electrically connected in parallel, and the control terminals of the transistor cells units are electrically connected. A first group of the transistor cell units includes a first threshold voltage. A second group of the transistor cell units includes a second threshold voltage larger than the first threshold voltage. A channel width of a transistor cell unit of the first group is smaller than a channel width of a transistor cell unit of the second group.


