Transistor Channel Region Insulating Material Structure

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Solution Overview

Problem

Current methods for forming channel regions in transistors and memory arrays face challenges in achieving efficient charge storage and retention, particularly in non-volatile memory cells, where the integration of charge-blocking and charge-storage materials is not optimized for improved performance.

Innovation Solution

The formation of a channel region in transistors involves the use of alternating tiers of insulative and conductive materials, with a charge-blocking region and charge-storage material structured as tubes, and the application of different insulating materials with specific properties to enhance charge passage and retention, such as silicon nitride and other high-k materials, to create a non-volatile programmable transistor.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional memory cell structures are used, then manufacturing simplicity is maintained, but charge storage efficiency and data retention are insufficient

Engineering Contradiction:

Improvedata retentionVSAvoidmemory cell structure

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The gate structure is segmented into multiple functional regions: a charge-blocking region (first gate region) and a charge-storage region (second gate region), separated by a gate insulator. This segmentation allows independent optimization of charge blocking and charge storage functions, improving data retention while maintaining manufacturability through modular fabrication processes.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent implements a nested structure where the first insulating material is positioned between the channel material and the charge-blocking region, and the second insulating material is positioned between the channel material and the charge-storage region. This nested arrangement of insulating layers within the gate structure enables enhanced charge passage control and improved interface quality, leading to better data retention without significantly increasing overall device complexity.

Inventive Principle:

Principle #7Nested doll (Nesting)

2Productivity

If simple gate structures are used, then manufacturing ease is maintained, but charge passage efficiency is insufficient

Engineering Contradiction:

Improvecharge passage efficiencyVSAvoidgate structure

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The first insulating material serves as an intermediary layer between the channel material and the charge-blocking region, while the second insulating material acts as an intermediary between the channel material and the charge-storage region. These intermediary insulating layers facilitate efficient charge passage by reducing interface traps and improving electrical contact, thereby enhancing productivity without requiring complex gate structures.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Productivity

If interface trap density is high, then manufacturing simplicity is maintained, but channel tunneling efficiency is reduced

Engineering Contradiction:

Improvechannel tunneling efficiencyVSAvoidinsulating material layers

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The patent employs composite insulating material structures with different materials positioned at different interfaces: the first insulating material at the channel-charge-blocking interface and the second insulating material at the channel-charge-storage interface. This composite approach optimizes interface quality and reduces trap density at each specific interface, thereby enhancing channel tunneling efficiency while keeping the overall device structure manageable.

Inventive Principle:

Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach improves string current in memory cells, enhances channel tunneling in programmable charge-storage transistors, and reduces interface trap density, leading to improved data retention and storage capabilities in memory arrays.

Implementation Method 1

The amorphous channel material having the insulator material there-adjacent is subjected to a temperature at or above the crystallization temperature to transform the amorphous channel material into crystalline channel material

Methodology Applied

Scientific EffectCrystallization: Crystallisation

Data Source

PatentUS10971360B2Methods of forming a channel region of a transistor and methods used in forming a memory array

Publication Date: 2021.04.06 MICRON TECHNOLOGY INC

AI summary

A transistor comprises channel material having first and second opposing sides. A gate is on the first side of the channel material and a gate insulator is between the gate and the channel material. A first insulating material has first and second opposing sides, with the first side being adjacent the second side of the channel material. A second insulating material of different composition from that of the first insulating material is adjacent the second side of the first insulating material. The second insulating material has at least one of (a), (b), and (c), where, (a): lower oxygen diffusivity than the first material, (b): net positive charge, and (c): at least two times greater shear strength than the first material. In some embodiments, an array of elevationally-extending strings of memory cells comprises such transistors. Other embodiments, including method, are disclosed.