Transistor Channel Layer Crystallization for Display Apparatus
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Solution Overview
Problem
Existing display apparatuses face challenges with the multilayered structure transistors due to damage from diffused reflection and thermal issues during the annealing process, particularly with oxide materials like IGZO and ITZO, which affect the channel layer of switching transistors, leading to productivity limitations and non-uniform crystallization.
Innovation Solution
The use of a seed layer and a compound crystallization layer made of at least two Group IV elements, such as Si, Ge, and C, as channel layers in transistors, along with a polycrystalline silicon layer, to improve performance and manufacturing efficiency, where the seed layer is deposited and patterned to form the semiconductor layer, and the crystallization layer is grown with the same crystal structure to enhance transistor performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If oxide materials (IGZO, ITZO) are used as channel layer in upper switching transistor, then high field effect mobility is achieved, but channel layer is damaged during annealing process due to diffused reflection or thermal problems
Solution Approach 1:
The patent divides the semiconductor layer into two separate layers: a lower driving transistor layer and an upper switching transistor layer. This segmentation allows each layer to be optimized independently, with the upper layer using oxide materials for high mobility while the lower layer uses polycrystalline silicon that can withstand annealing temperatures, thus resolving the thermal damage issue during annealing process
Solution Approach 2:
The patent changes the material composition parameter of the semiconductor layer by using different materials for different transistor layers. The upper switching transistor uses oxide semiconductor materials (IGZO, ITZO) for high field effect mobility, while the lower driving transistor uses polycrystalline silicon for thermal stability during annealing, thus resolving the contradiction between mobility and thermal resistance
2Ease of manufacture
If sputtering process is used to deposit IGZO and ITZO, then channel layer is formed, but particles are generated and uniform crystallization of large area is difficult
Solution Approach 1:
The patent applies a preliminary low-temperature annealing process (200-400°C) to the polycrystalline silicon layer before the main high-temperature annealing. This preliminary action prepares the crystal structure in advance, promoting uniform crystallization across large areas and reducing particle generation during subsequent processing, thus resolving the manufacturing precision issue
3Stability of the object's composition
If polycrystalline silicon layer is used for lower driving transistor, then thermal stability during annealing is achieved, but productivity is limited due to technical limitations in achieving uniform crystallization
Solution Approach 1:
The patent implements a preliminary low-temperature annealing step (200-400°C) for the polycrystalline silicon layer before the main high-temperature annealing process. This preliminary action promotes uniform crystallization across large areas, significantly improving yield and productivity while maintaining the thermal stability benefits of polycrystalline silicon, thus resolving the productivity limitation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the performance and productivity of display apparatuses by reducing damage and enhancing crystallization uniformity, leading to higher field-effect mobility and faster operation, while also simplifying the manufacturing process and reducing thermal stress on the transistors.
Implementation Method 1
forming a seed layer by depositing a gas comprising at least two materials of Group IV elements; forming a crystallization layer by depositing a same material as the seed layer on the seed layer
Implementation Method 2
forming a crystallization layer by depositing a same material as the seed layer on the seed layer; at least a portion of the second layer may have the same crystal as the first layer
Data Source
AI summary
Provided is a display apparatus. The display apparatus includes a base substrate, a first transistor disposed on the base substrate and including a first semiconductor layer including a first layer and a second layer disposed to come into contact with a first layer and including a compound made of at least two materials of a Group IV elements, a first control electrode overlapping the first semiconductor layer, a first input electrode connected to the first semiconductor layer, and a first output electrode connected to the first semiconductor layer, a second transistor and an organic light emitting diode.