Transistor Column Rectifier Leakage Current Reduction
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Solution Overview
Problem
Existing semiconductor devices that recover energy from environmental radio waves using charge pump rectifier circuits face inefficiencies due to high leakage currents, which reduce AC signal conversion efficiency.
Innovation Solution
A semiconductor device design featuring first and second transistor columns with NMOS and PMOS transistors connected in series, where the gate of the PMOS transistor in one column is connected to the NMOS and PMOS transistors of the other column, and an AC signal with a bias voltage lower than the gate voltage of the PMOS transistor is supplied to the NMOS transistor, reducing leakage current and improving conversion efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a charge pump rectifier circuit is used to recover energy from environmental radio waves, then energy conversion is achieved, but leakage current increases and conversion efficiency decreases
Solution Approach 1:
The patent applies parameter changes by adjusting the bias voltage level to be lower than the gate voltage of the PMOS transistor, which fundamentally changes the operating point of the transistor circuit. This parameter adjustment optimizes the balance between leakage current reduction and conversion efficiency maintenance, resolving the contradiction between energy loss and productivity.
Solution Approach 2:
The patent employs asymmetry by using different bias voltage levels for the NMOS and PMOS transistors within the same circuit structure. The AC signal is superimposed on a bias voltage that is specifically lower than the PMOS gate voltage, creating an asymmetric biasing scheme that differentially controls the operation of N-type and P-type transistors to minimize leakage while maintaining efficiency.
2Ease of manufacture
If resistors and capacitors are used in the charge pump rectifier circuit, then circuit functionality is achieved, but chip area increases
Solution Approach 1:
The patent merges the functions of bias voltage generation and AC signal processing into a single integrated transistor column structure. By combining the biasing network and rectification function within the same transistor configuration, the circuit eliminates the need for separate resistors and capacitors, thereby maintaining full circuit functionality while significantly reducing chip area.
Solution Approach 2:
The transistor column structure serves multiple functions simultaneously: it provides bias voltage regulation, AC signal rectification, and leakage current control all within a single integrated unit. This multi-functionality eliminates the need for separate discrete components like resistors and capacitors, achieving both ease of manufacture and compact chip area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration significantly reduces leakage current and enhances AC signal conversion efficiency, particularly when recovering energy from AC signals with small amplitudes, while also minimizing chip area requirements by eliminating the need for resistors and capacitors.
Implementation Method 1
operating a charge pump rectifier circuit by the received environmental radio wave
Data Source
AI summary
A semiconductor device comprising a rectifier circuit, wherein the rectifier circuit includes first and second input wires to which AC signals whose phases are inverted from each other are transmitted; a first transistor of a first conductive type which has a first power wire connected with a first transistor terminal and a gate connected with the first input wire; a second transistor of the first conductive type which has the first power wire connected with a first transistor terminal, and a gate connected with the second input wire; a third transistor of a second conductive type which has a second power wire connected with a first transistor terminal, a second transistor terminal connected with a second transistor terminal of the first transistor and a gate connected with the first input capacitor; and a fourth transistor of the second conductive type which has the second power wire connected with a first transistor terminal.


