Transistor Edge Dislocation Stress Retention
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Solution Overview
Problem
Current transistors in integrated circuits face limitations in drive current performance due to the reduction of tensile stress caused by edge dislocations when free surfaces are introduced at the same level as the conduction channel, which reduces electron mobility and drive current.
Innovation Solution
Elevating free surfaces above the conduction channel to retain the tensile stresses introduced by edge dislocations, achieved by forming edge dislocations adjacent to the conduction channel and using epitaxial semiconductor material deposition with subsequent etching to create raised source and drain regions, ensuring that any free surfaces are positioned above the channel to maintain stress levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If free surfaces are introduced at the same level as the conduction channel, then manufacturing is simplified, but tensile stress is reduced and electron mobility decreases
Solution Approach 1:
The patent introduces free surfaces at a different vertical level (above the conduction channel) rather than at the same level, thereby maintaining tensile stress in the channel while still providing the manufacturing benefits of free surfaces. This dimensional separation resolves the contradiction between ease of manufacture and device performance.
2Reliability
If edge dislocations are introduced to increase tensile stress, then electron mobility improves, but device complexity increases
Solution Approach 1:
The patent introduces edge dislocations locally at specific positions adjacent to the conduction channel rather than throughout the entire device structure. This localized approach provides the necessary tensile stress to improve electron mobility while minimizing the overall complexity of the device structure.
3Reliability
If free surfaces are elevated above the conduction channel, then tensile stress is maintained and drive current increases, but manufacturing precision requirements increase
Solution Approach 1:
The patent performs epitaxial deposition to create raised source and drain regions before final device fabrication steps, preliminarily establishing the elevated free surface structure. This preliminary action ensures that subsequent manufacturing steps can proceed with standard precision requirements while maintaining the stress-beneficial geometry.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach increases electron mobility and drive current by maintaining tensile stress in the conduction channel, resulting in a 10-20% higher drive current compared to devices with free surfaces at the same level as the conduction channel, while maintaining dislocation stress at initial levels.
Implementation Method 1
at least one edge dislocation is formed adjacent to a conduction channel of the transistor. The at least one edge dislocation introduces a tensile stress in the conduction channel.
Implementation Method 2
epitaxial semiconductor material deposition with subsequent etching to create raised source and drain regions
Data Source
AI summary
A device is provided. The device includes a transistor formed on a semiconductor substrate, the transistor having a conduction channel. The device includes at least one edge dislocation formed adjacent to the conduction channel on the semiconductor substrate. The device also includes at least one free surface introduced above the conduction channel and the at least one edge dislocation.