High Voltage Transistor Field Structure with Conduction Units

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Solution Overview

Problem

High voltage transistor devices face challenges in achieving optimal breakdown voltages due to burdensome gate-to-drain capacitance and increased fabrication costs associated with existing field plate formation methods, which either worsen switching losses or require additional processing steps.

Innovation Solution

A high voltage transistor device with a field structure incorporating vertically elongated conduction units made from conductive material, formed concurrently with metal contacts or vias, which reduces parasitic capacitance and fabrication costs by allowing for a low-cost method of fabrication and flexible design configurations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If field plates are formed by extending conductive gate material from gate electrode towards drift region, then breakdown voltage capability is improved, but gate-to-drain capacitance increases and switching losses worsen

Engineering Contradiction:
Improvebreakdown voltage capabilityVSAvoidswitching losses
Core Design Contradiction:
StrengthVSLoss of energy

Solution Approach 1:

The invention extracts the field plate function from the gate electrode structure by forming separate field plates in the inter-level dielectric layer. This separation removes the field plate from direct electrical connection to the gate electrode, thereby reducing gate-to-drain capacitance and switching losses while maintaining breakdown voltage enhancement through the field plate's electric field modulation effect in the drift region.

Inventive Principle:
Principle #2Taking out (Extraction)

2Loss of energy

If separate field plates are patterned to reduce gate-to-drain capacitance, then switching losses are reduced, but fabrication complexity increases due to additional processing steps

Engineering Contradiction:
Improveswitching lossesVSAvoidfabrication process complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The invention merges the field plate formation process with the existing contact/via fabrication process. Both field plates and contacts/vias are formed concurrently by filling openings in the inter-level dielectric layer with conductive material in a single processing step, eliminating additional masks and process steps while achieving reduced gate-to-drain capacitance and switching losses.

Inventive Principle:
Principle #5Merging (Combining)

3Loss of energy

If non-gate materials are used for field plate formation, then gate-to-drain capacitance is reduced, but fabrication cost increases due to additional processing steps

Engineering Contradiction:
Improvegate-to-drain capacitanceVSAvoidfabrication cost
Core Design Contradiction:
Loss of energyVSEase of manufacture

Solution Approach 1:

The invention makes the conductive material filling process universal by using the same material and process for both field plates and contacts/vias. This multi-functional approach allows a single conductive material deposition and filling process to serve multiple purposes: forming field plates for voltage enhancement, forming contacts for electrical connection, and forming vias for inter-layer connectivity, thereby reducing fabrication cost while achieving low gate-to-drain capacitance.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The use of discrete conduction units enhances breakdown voltage capability and reduces parasitic capacitance, providing a cost-effective and efficient solution for high voltage transistor devices by integrating with existing CMOS fabrication processes without additional masks or steps.

Implementation Method 1

Field plates are conductive elements, which are placed over a channel region to enhance the performance of a high voltage transistor device by manipulating electric fields (e.g., reducing peak electric fields) generated by a gate electrode

Methodology Applied
Scientific EffectElectric field manipulation: Electric Field

Implementation Method 2

The at least one conduction unit is disposed over the drift region and vertically extends from the dielectric layer to a top surface of the first ILD layer... reduces parasitic capacitance

Methodology Applied
Scientific EffectParasitic capacitance reduction: Capacitance

Data Source

PatentUS10680100B2Field structure and methodology
Publication Date: 2020.06.09 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10680100B2 patent drawing
  • US10680100B2 patent drawing
  • US10680100B2 patent drawing

AI summary

The present disclosure relates to a high voltage transistor device having a field structure that includes at least one conduction unit, and a method of formation. In some embodiments, the high voltage transistor device has a gate electrode disposed over a substrate between a source region and a drain region located within the substrate. A dielectric layer laterally extends from over the gate electrode to over a drift region between the gate electrode and the drain region. A field structure is located within the first ILD layer. The field structure includes a conduction unit having a vertically elongated shape and vertically extending from a top surface of the dielectric layer and a top surface of the first ILD layer.