Transistor Gate Stack With Fluorine-Tuned Work Function Metal
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Solution Overview
Problem
As semiconductor devices continue to reduce minimum feature sizes for increased integration density, challenges arise in maintaining device performance and reliability, particularly in gate structures of transistors.
Innovation Solution
Incorporation of a fluorine-treated work function metal layer in the gate dielectric, with fluorine diffusion through thermal processes, and a capping layer to prevent oxidation, enhancing the flatband voltage and threshold voltage of transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If minimum feature sizes are reduced to increase integration density, then more components can be integrated into a given area, but device performance and reliability deteriorate
Solution Approach 1:
The patent applies local quality by introducing a fluorine-treated work function metal layer specifically at the gate dielectric interface, rather than uniformly treating the entire device. This localized treatment modifies the electrical properties at the critical interface region, improving threshold voltage control and device reliability without affecting other areas of the transistor structure.
Solution Approach 2:
The patent employs parameter changes by altering the chemical composition of the gate dielectric interface through fluorine treatment. The fluorine diffusion changes the work function of the metal layer and modifies the electrical characteristics of the gate stack, enabling better voltage control in scaled devices while maintaining integration density benefits.
2Reliability
If fluorine treatment is applied to the work function metal layer to improve voltage characteristics, then flatband voltage increases towards the band edge, but oxygen diffusion into the gate dielectric becomes a concern
Solution Approach 1:
The patent uses an intermediary approach by introducing a fluorine-containing layer as a mediator between the work function metal and the gate dielectric. This fluorine treatment serves as a protective interface that prevents oxygen diffusion into the gate dielectric while simultaneously adjusting the electrical properties to achieve desired threshold voltage control.
Solution Approach 2:
The patent applies composite materials by creating a multi-layer gate stack structure that includes the fluorine-treated work function metal layer combined with the gate dielectric. This composite structure leverages the beneficial electrical properties of the fluorine-treated metal while the overall stack design prevents harmful oxygen diffusion, achieving both voltage control and reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Improves device performance by increasing flatband voltage towards the band edge of the metal layer, reducing threshold voltage, and minimizing oxygen diffusion into the gate dielectric, thereby enhancing transistor reliability and efficiency.
Implementation Method 1
fluorine diffusion through thermal processes
Implementation Method 2
capping layer to prevent oxidation
Data Source
AI summary
A device includes a first nanostructure; a second nanostructure over the first nanostructure; a first high-k gate dielectric around the first nanostructure; a second high-k gate dielectric around the second nanostructure; and a gate electrode over the first and second high-k gate dielectrics. The gate electrode includes a first work function metal; a second work function metal over the first work function metal; and a first metal residue at an interface between the first work function metal and the second work function metal, wherein the first metal residue has a metal element that is different than a metal element of the first work function metal.