Transistor Gate Structure for Fluorine Retention and Vt Control

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Solution Overview

Problem

As semiconductor devices continue to shrink in size, challenges arise in maintaining the integration density and performance of transistors, particularly in retaining fluorine in work function metal layers within gate dielectrics, leading to dissociation issues that affect the flatband voltage and threshold voltage of transistors.

Innovation Solution

Implementing an aluminum treatment on the gate dielectric followed by a fluorine treatment to enhance fluorine retention in the work function metal layer, improving the diffusion of fluorine into the gate dielectric, thereby increasing flatband voltage and decreasing threshold voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the minimum feature size is reduced to improve integration density, then more components can be integrated into a given area, but fluorine retention in work function metal layers deteriorates leading to dissociation issues

Engineering Contradiction:
Improveintegration densityVSAvoidfluorine retention
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

An aluminum treatment is performed on the gate dielectric before depositing the work function metal layer. This preliminary aluminum treatment modifies the gate dielectric surface to enhance subsequent fluorine retention in the work function metal layer, preventing dissociation issues that would otherwise occur at scaled dimensions

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Aluminum acts as an intermediary substance between the gate dielectric and the work function metal layer. The aluminum treatment creates intermediate surface properties on the gate dielectric that facilitate better fluorine retention in the overlying work function metal layer, resolving the contradiction between scaling and fluorine stability

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If fluorine is retained in the work function metal layer to improve flatband voltage, then threshold voltage control is enhanced, but the process complexity increases due to additional aluminum and fluorine treatments

Engineering Contradiction:
Improveflatband voltage controlVSAvoidprocess steps
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The aluminum treatment and fluorine treatment are combined into a integrated process sequence that modifies the gate dielectric surface and subsequently deposits the work function metal layer with improved fluorine retention in a coordinated manner, achieving precise flatband voltage control while managing process complexity through systematic integration

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If the gate dielectric is treated with aluminum to enhance fluorine diffusion, then fluorine retention improves, but the additional process step increases manufacturing complexity

Engineering Contradiction:
Improvefluorine retentionVSAvoidprocess simplicity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The aluminum treatment is performed as a preliminary step before work function metal layer deposition, preparing the gate dielectric surface to enhance fluorine retention. This preliminary modification enables improved fluorine diffusion and retention characteristics without requiring complex post-processing steps

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the performance of transistors by increasing flatband voltage towards the band edge of the metal layer and reducing the threshold voltage, leading to improved device performance.

Implementation Method 1

enhance the diffusion of fluorine into the gate dielectric

Methodology Applied
Scientific EffectDiffusion: Diffusion

Implementation Method 2

performing a fluorine treatment on the first conductive material

Methodology Applied
Scientific EffectDeposition: Deposition (physical)

Data Source

PatentUS20260082653A1Gate structures in transistors and method of forming same
Publication Date: 2026.03.19 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20260082653A1 patent drawing
  • US20260082653A1 patent drawing
  • US20260082653A1 patent drawing

AI summary

In some embodiments, a method includes forming a plurality of nanostructures over a substrate; etching the plurality of nanostructures to form first recesses; forming source/drain regions in the first recesses; removing first nanostructures of the plurality of nanostructures leaving second nanostructures of the plurality of nanostructures; depositing a gate dielectric over and around the second nanostructures; performing an aluminum treatment on the gate dielectric; depositing a first conductive material over and around the gate dielectric; performing a fluorine treatment on the first conductive material; and depositing a second conductive material over and around the first conductive material.