Multi-cell Transistor Gate Jumper Segmentation

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Solution Overview

Problem

High power, high frequency transistor devices face challenges in maintaining high frequency performance and reliability due to increased current densities caused by wider gate fingers, which can lead to electromigration issues.

Innovation Solution

The implementation of a gate jumper structure that divides the gate finger into segments, allowing for multiple points of signal distribution along the gate finger, reducing current density and improving high frequency gain performance by connecting the gate pad to the gate finger at various locations, thereby increasing the effective gate width without adverse effects on high frequency performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If the gate fingers are made wider to increase output power, then the gate periphery is increased, but the high frequency performance is adversely impacted and electromigration occurs

Engineering Contradiction:
Improveoutput powerVSAvoidhigh frequency performance
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The gate finger is divided into multiple segments along its length, with each segment connected to the gate pad at different positions. This segmentation allows the gate signal to be distributed to multiple points, effectively increasing the gate periphery without requiring a single wide gate finger, thus maintaining high frequency performance while achieving increased output power capability

Inventive Principle:
Principle #1Segmentation

2Productivity

If the gate fingers are made wider to increase gate periphery, then more current can be handled, but current density increases causing electromigration

Engineering Contradiction:
Improvegate peripheryVSAvoidelectromigration resistance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The gate finger is segmented into multiple sections connected at different positions to the gate pad. This segmentation distributes the current flow across multiple connection points and narrower finger sections, reducing the current density in any single location and preventing electromigration while maintaining the required effective gate periphery

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Instead of increasing gate periphery by making gate fingers wider in one dimension (which increases current density), the invention uses multiple connection points along the length of the gate finger, utilizing the dimensional space along the gate finger to achieve increased effective gate width without increasing local current density

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentEP3430649B1Multi-cell transistor comprising a gate jumper
Publication Date: 2022.05.04 WOLFSPEED INC
  • EP3430649B1 patent drawingFigure 1
  • EP3430649B1 patent drawingFigure 2
  • EP3430649B1 patent drawingFigure 3~4

AI summary

A transistor device includes a source contact extending in a first direction, a gate finger extending in the first direction adjacent the source contact, and a drain contact adjacent the gate finger, wherein the gate finger is between the drain contact and the source contact. The device further includes a gate jumper extending in the first direction, a gate bus connected to the gate jumper and the gate finger, and a gate signal distribution bar that is spaced apart from the gate bus in the first direction and that connects the gate jumper to the gate finger.