Transistor Gate Spacer Formation Without Etching Feet
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Solution Overview
Problem
Existing methods for forming spacers in CMOS transistors on silicon-on-insulator substrates face challenges in achieving precise control of critical dimensions and often result in etching feet or damage to the active layer, limiting transistor performance.
Innovation Solution
A method involving the anisotropic implantation of hydrogen-based ions into the basal portions of a dielectric layer, followed by annealing to desorb the ions and selectively remove modified portions, allowing for the formation of spacers without etching feet and preserving the active layer integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If direct anisotropic etching of basal portions is performed to form spacers, then spacer formation is achieved, but etching precision deteriorates and etching feet are formed
Solution Approach 1:
The patent applies preliminary action by implanting hydrogen-based ions into the dielectric layer before the etching process. This pre-modification of the dielectric layer creates a distinct modified region that enables precise etching control. The hydrogen implantation prepares the basal portions of the dielectric layer to be selectively removable, allowing the etching process to stop precisely at the desired location without forming etching feet, thus solving the control difficulty issue.
2Manufacturing precision
If etching is prolonged to remove basal portions completely, then spacer formation is improved, but the active layer is damaged
Solution Approach 1:
The patent applies local quality by creating a spatially differentiated structure where only the basal portions of the dielectric layer are modified with hydrogen-based ions, while the lateral portions remain unmodified. This localized modification allows the etching process to selectively remove only the basal portions that need to be removed for spacer formation, stopping precisely before reaching the active layer. The lateral portions of the dielectric layer protect the active layer during etching, preventing damage while achieving complete basal portion removal.
3Manufacturing precision
If ion implantation depth is increased to modify entire dielectric layer thickness, then spacer definition is improved, but active layer integrity deteriorates
Solution Approach 1:
The patent applies partial action by implanting hydrogen-based ions to a depth that modifies the entire thickness of the dielectric layer's basal portions but stops before significantly penetrating into the active layer. The implantation depth is carefully controlled to be sufficient to modify the complete dielectric layer thickness for precise spacer definition, yet limited enough to prevent excessive damage to the active layer. Subsequent selective removal of the modified portions eliminates any potentially damaged regions, achieving precise critical dimension definition while preserving active layer integrity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the precision of spacer definition and maintains the integrity of the underlying active layer, improving transistor performance by relaxing constraints on implantation depth and energy ranges.
Implementation Method 1
anisotropic modification of the basal portions of said dielectric layer by implantation of hydrogen-based ions
Implementation Method 2
an annealing process configured to desorb the hydrogen-based species implanted in the active layer
Implementation Method 3
annealing process configured to desorb the hydrogen-based species implanted in the active layer
Implementation Method 4
removal of the second modified basal portions by selective etching of the second modified dielectric material with respect to the base dielectric material and with respect to the semiconductor material
Data Source
Figure 1A~1C
Figure 2
Figure 3A~3B
AI summary
The invention relates to a method for forming the spacers of a gate of a transistor comprising: - A supply of an active layer (13) surmounted by a gate (20), - a formation of a dielectric layer (3) covering the gate and the active layer, said dielectric layer having lateral portions (30l), and basal portions covering the active layer, - an anisotropic modification of the basal portions by implantation of hydrogen-based ions in a direction (Z) parallel to the lateral flanks of the gate (22), forming modified basal portions (31b), - an annealing desorbing the hydrogen from the active layer (13) and transforming the modified basal portions (31b) into second modified basal portions (32b).- a removal of the modified basal portions (32b) by selective etching of the modified dielectric material with respect to the unmodified dielectric material and with respect to the semiconductor material, so as to form the spacers (E) on the lateral sides of the grid.