Transistor Gate Wing Portions Mitigate Leakage
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Solution Overview
Problem
Conventional planar channel transistors face increased power consumption due to leakage current caused by concentrated electric fields between the source/drain and carrier channel, which is exacerbated by the decreasing size and channel length of these devices.
Innovation Solution
The transistor device features a gate structure with wing portions that form obtuse angles with the body and head portions, creating rounded edges that mitigate electric field crowding, and slanted sides relative to the source/drain, reducing leakage current and power consumption while enhancing driving current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the size and channel length of conventional planar channel transistor are reduced, then the transistor size decreases, but leakage current increases due to concentrated electric field at the boundary between isolation structure and active region
Solution Approach 1:
The gate structure employs rounded corners instead of sharp angles at the intersections of gate portions and isolation structures. This curvature design distributes the electric field more uniformly across the active region, preventing the formation of concentrated electric field points that would otherwise cause increased leakage current. The rounded geometry effectively eliminates the sharp boundary effects between isolation structures and active regions.
Solution Approach 2:
The gate structure uses unequal arm lengths extending from the central gate body, with first arms having a first length and second arms having a second length that differs from the first length. This asymmetric configuration optimizes the electric field distribution across the active region, reducing concentration at specific boundaries while maintaining effective channel control, thereby reducing leakage current in scaled devices.
2Speed
If the channel length is reduced, then the transistor switching speed improves, but power consumption increases due to higher leakage current
Solution Approach 1:
Rounded corners at the gate-isolation structure intersections eliminate concentrated electric fields that cause leakage current. This allows for shorter channel lengths and faster switching speeds without the penalty of proportionally increased leakage, thereby improving the switching speed to power consumption ratio.
Solution Approach 2:
The gate structure applies different arm lengths (first length vs. second length) to different regions of the active area, optimizing local electric field control. This localized optimization reduces leakage current in specific high-risk regions while maintaining overall fast switching performance, effectively decoupling speed improvement from power consumption increase.
Data Source
AI summary
A transistor device includes an active region surrounded by an isolation structure, a gate structure disposed over the active region and the isolation structure, and a source/drain disposed in the active region. The gate structure includes a body portion extending in a first direction, a head portion extending in a second direction, and a pair of wing portions disposed at two opposite sides of the body portion. The first direction and the second direction are perpendicular to each other. Each of the wing portions is in contact with the head portion and the body portion.


