Transistor Insertion Layer to Block Passivation-Channel Diffusion

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Solution Overview

Problem

Existing transistors face challenges with the diffusion of ambient gases through passivation layers, leading to channel degradation, and intermixing of passivation layer materials with the channel layer, which alters channel properties and reduces performance.

Innovation Solution

Incorporating an insertion layer between the channel layer and the passivation layer, which mitigates the intermixing of materials and reduces the diffusion of gases, thereby maintaining channel integrity and enhancing transistor performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a passivation layer is used to protect the channel, then protection from environmental degradation is improved, but intermixing of passivation layer materials with the channel layer occurs which alters channel properties

Engineering Contradiction:
Improveprotection from environmental degradationVSAvoidchannel layer composition
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

An insertion layer is introduced between the passivation layer and the channel layer to act as a barrier that prevents intermixing of materials. The insertion layer comprises a material that is incompatible with the passivation layer material, thereby blocking diffusion of passivation layer materials into the channel layer while maintaining the protective function of the passivation layer.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Object-affected harmful factors

If the passivation layer is made denser to block gas diffusion, then protection from gas diffusion is improved, but intermixing with the channel layer worsens

Engineering Contradiction:
Improvegas diffusionVSAvoidchannel layer composition
Core Design Contradiction:
Object-affected harmful factorsVSStability of the object's composition

Solution Approach 1:

The insertion layer serves as an intermediary barrier that addresses both gas diffusion and material intermixing. By selecting a material for the insertion layer that is incompatible with both the passivation layer and the channel layer, it effectively blocks gas diffusion while preventing intermixing of passivation layer materials with the channel layer.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If no insertion layer is used, then device complexity is reduced, but channel degradation from diffusion occurs

Engineering Contradiction:
Improvelayer structureVSAvoidchannel integrity
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The insertion layer is a thin barrier layer that prevents channel degradation from diffusion. By selecting a material that is incompatible with both the passivation layer and the channel layer, it effectively blocks diffusion of harmful materials while maintaining overall device performance and reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The insertion layer effectively reduces impurities in the channel layer from both atmospheric gases and the passivation layer, resulting in less variance in channel properties and improved transistor performance.

Implementation Method 1

the diffusion of ambient gases through passivation layers, leading to channel degradation

Methodology Applied
Scientific EffectDiffusion: Diffusion

Implementation Method 2

intermixing of passivation layer materials with the channel layer, which alters channel properties

Methodology Applied
Scientific EffectIntermixing: Diffusion

Data Source

PatentUS20250133820A1Insertion layer between channel and passivation for transistor
Publication Date: 2025.04.24 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250133820A1 patent drawing
  • US20250133820A1 patent drawing
  • US20250133820A1 patent drawing

AI summary

In some embodiments, the present disclosure relates to an integrated device, including a substrate; a gate overlying the substrate; a channel layer separated from the gate by a dielectric and overlying the gate; source/drain regions on the channel layer, the gate extending between the source/drain regions; an insertion layer conforming to an upper surface of the channel layer and comprising a first material; and a passivation layer conforming to an upper surface of the insertion layer and comprising a second material different from the first material; where the passivation layer has a higher density than the insertion layer, such that the passivation layer mitigates the diffusion of environmental materials towards the channel layer, and where the insertion layer mitigates the diffusion of the second material from the passivation layer into the channel layer.