Transistor With Integrated Capacitor For Snubber Circuit
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Solution Overview
Problem
Existing DC to DC converter topologies face limitations in efficiency and power density due to high switching losses and circuit ringing, which are difficult to control with external snubber circuits, leading to non-ideal switching waveforms and the need for high-voltage rated transistors.
Innovation Solution
Integration of a drain-extended MOS transistor with an integrated drain-source capacitor directly connected to the transistor's source and drain, providing a low inductance, low equivalent series resistance snubber circuit to reduce ringing and enable higher operating frequencies, facilitating zero voltage or current switching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If external snubber circuits are added to control ringing, then circuit ringing is suppressed, but additional inductances are introduced and device complexity increases
Solution Approach 1:
The patent merges the snubber circuit functionality directly into the transistor structure by integrating a capacitor between the source and drain regions within the semiconductor device itself. This eliminates the need for external snubber circuits and their associated inductances, thereby suppressing ringing while reducing device complexity.
Solution Approach 2:
The integrated capacitor acts as an intermediary element that provides snubber functionality internally. By placing the capacitor directly between source and drain, it mediates the voltage transitions and suppresses ringing without requiring external components, thus avoiding the introduction of additional inductances.
2Power
If switching frequency is increased to facilitate higher power density, then power density improves, but switching losses increase and ringing becomes more severe
Solution Approach 1:
The integrated capacitor is prepared in advance within the transistor structure to provide immediate snubber action during switching transitions. This preliminary configuration enables the circuit to handle higher switching frequencies by pre-establishing the voltage clamping mechanism, thereby reducing switching losses and suppressing ringing at higher frequencies.
3Strength
If high voltage rated transistors are used to withstand input voltage, then voltage withstand capability improves, but on-state resistance increases and efficiency decreases
Solution Approach 1:
The patent changes the voltage parameter profile by using the integrated capacitor to dynamically clamp and control the drain-source voltage during switching transitions. This allows the use of lower voltage rated transistors with optimized on-state resistance, as the capacitor manages the voltage stress rather than relying solely on the transistor's voltage rating.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances power density and efficiency by reducing switching losses, allowing for higher frequency operation and the use of lower voltage rated transistors, while minimizing external components and circuit inductances.
Implementation Method 1
an integrated capacitor with a first interconnect structure connected directly to the source, and a second interconnect structure connected directly to the drain
Data Source
AI summary
An electronic device includes a MOS transistor with a source and a drain, and a capacitor with a first plate connected directly to the source, and a second plate connected directly to the drain. A method to fabricate an electronic device includes fabricating a MOS transistor on or in a semiconductor structure, and fabricating a capacitor having a first plate connected directly to a source of the MOS transistor, and a second plate connected directly to a drain of the MOS transistor.